pico-imx7d: Add instructions for booting in Falcon mode
Improve the README by adding instructions on how to boot using
Falcon mode, which allows the SPL to load the kernel directly,
without using U-Boot proper.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Fabio Berton [Fri, 23 Aug 2019 18:01:00 +0000 (15:01 -0300)]
pico-imx7d: Sync pico-hobbit-imx7d_defconfig
Update pico-hobbit-imx7d_defconfig using pico-imx7d_defconfig as base
to fix device tree file generation. With this all pico-imx7d are
creating u-boot-dtb.img files.
habv4: tools: Avoid hardcoded CSF size for SPL targets
Currently it's not possible to authenticate the U-Boot proper of
mx6ul_14x14_evk_defconfig target:
Authenticate image from DDR location 0x877fffc0...
bad magic magic=0x0 length=0x00 version=0x3
bad length magic=0x0 length=0x00 version=0x3
bad version magic=0x0 length=0x00 version=0x3
spl: ERROR: image authentication fail
Commit 0633e134784a ("imx: hab: Increase CSF_SIZE for i.MX6 and
i.MX7 devices") has increased CSF_SIZE to avoid a possible issue
when booting encrypted boot images.
Commit d21bd69b6e95 ("tools: mkimage: add firmware-ivt image type
for HAB verification") is hardcoding the CSF and IVT sizes, the
new CSF size is not being considered and u-boot-ivt.img fails to
boot.
Avoid hardcoded CSF and IVT size to fix this issue.
Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peng Fan [Mon, 26 Aug 2019 08:12:16 +0000 (08:12 +0000)]
imx: scu_api: add sc_pm_is_partition_started
Add sc_pm_is_partition_started to check whether a partition
has been started. This will be used to detect M4 partition booted up or
not, then we could choose which dtb to use. If M4 is up, we need
use dtb, such as imx8qm-mek-rpmsg.dtb.
Peng Fan [Mon, 26 Aug 2019 08:12:13 +0000 (08:12 +0000)]
imx8: fdt: add optee node
Add OP-TEE device tree node for Linux according to args passed from ATF.
If ATF has been built with OP-TEE running, boot_pointer[1] will indicate
that.
Peng Fan [Mon, 26 Aug 2019 08:11:56 +0000 (08:11 +0000)]
imx8: disable node when the resource is not owned
When resource is not assigned to non-secure Linux, if linux continue
to use the node, linux may crash or hang. So need to set the node
status to disabled for not owned resources.
The resource id is in the power-domains property in device tree,
so parse the power-domains property to get the resource id and
use scfw api to check whether it is owned by current partition.
Peng Fan [Thu, 22 Aug 2019 07:42:41 +0000 (07:42 +0000)]
imx: add container target
To support SPL loading container file, add a new Makefile target,
and introduce a new Kconfig file to source the cfg file which
will be parsed by mkimage.
Peng Fan [Thu, 22 Aug 2019 07:42:38 +0000 (07:42 +0000)]
spl: mmc: support loading i.MX container format file
i.MX8 only support AHAB secure boot with Container format image,
we could not use FIT to support secure boot, so introduce container
support to let SPL could load container images.
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Cc: York Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
The first stage of flash.bin is larger than 584 * 512, so when
writting u-boot.itb, some data will be override. Enlarge the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to fix boot.
Peng Fan [Wed, 14 Aug 2019 09:27:06 +0000 (09:27 +0000)]
imx: imx6qdl: dtsi: move U-Boot specific change to u-boot.dtsi
The changes were added by following patch:
commit <9002e735e717> ("imx: mx6sabresd: fix boot hang with video")
commit <f45ec8fcfb86> ("imx6: dts: add 'u-boot, dm-pre-reloc' to soc and ipu nodes")
Let's move the U-Boot specific change to imx6qdl-u-boot.dtsi
As explained in Commit 23612534fe0f ("spl: imx6: Provide a SPL_SIZE_LIMIT
default") the i.MX6 SPL size limit is 68KB.
The ROM code is copying the image size defined in boot data to its
respective load address, in case we exceed the OCRAM free region a
HAB invalid address failure event is generated.
The maximum CSF size is defined in CONFIG_CSF_SIZE, reduce SPL size
limit based on this configuration.
Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Currently the SPL binary is 67 kB, which leaves only 1 kB of free
internal RAM space.
The following options can be safely removed to save some precious
SPL space:
- CONFIG_SPL_FS_EXT4: u-boot-dtb.img is stored in raw sector via dd
command (at offset 69 kB)
- CONFIG_SPL_I2C_SUPPORT: I2C is not used during SPL
- CONFIG_SPL_OS_BOOT: no need to make Falcon mode supported
by default
After this change the SPL binary size gets down to 51 kB.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 22 Jul 2019 01:25:10 +0000 (01:25 +0000)]
i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXT
On i.MX7ULP B0, there is change in NIC clock dividers architecture.
On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but
on B0 they are parallel with NIC1 DIV. So now the dividers are independent.
This patch modifies the scg_nic_get_rate function according to this change.
Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 22 Jul 2019 01:25:03 +0000 (01:25 +0000)]
i.MX7ULP: Workaround APLL PFD2 to 345.6Mhz
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider
set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU
is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28)
to workaround the problem. The correct fix should let GPU handle the
clock rate in kernel.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Bai Ping [Mon, 22 Jul 2019 01:24:42 +0000 (01:24 +0000)]
i.MX7ULP: Fix system reset after a7 rtc alarm expired.
The board will reboot if A7 core enter mem mode by rtc, then M4 core
enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode
to fix this issue.
Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access
it. So check the CPU rev and not apply the settings for B0.
Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 22 Jul 2019 01:24:39 +0000 (01:24 +0000)]
i.MX7ULP: evk: Modify FDT file to disable SD3.0 for usb boot
Since the SD3.0 kernel driver needs M4 image support, this causes
problem for usb boot booting into kernel. To decouple the relationship,
we modify the FDT file in u-boot to disable SD3.0.
So the kernel won't depend on M4 image.
Robert Hancock [Thu, 8 Aug 2019 18:14:39 +0000 (12:14 -0600)]
ARM: imx: Support larger SPL size on IMX6DQ
Previously the SPL size on all iMX6 platforms was restricted to 68KB
because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the
other iMX6 variants have 256KB of OCRAM. Add an option
CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which
don't need to support the SL/DL variants. This allows for an SPL size of
196KB, which makes it much easier to use configurations such as SPL with
driver model and FDT control.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
spl: imx: only use HAB if spl fit signature is not enabled
There is no need to use HAB for FIT signature validation when
SPL_FIT_SIGNATURE is also enabled, as that will be validated via the
normal U-Boot signed FIT image flow.
This allows having SPL validated by HAB and the payloads to follow
being validated with FIT signatures only.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q
variants, which are quite similar and already managed via only one
dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in
order to automatically enable the HAS_CAAM and MX6_SMP features.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Commit e37ac717d796 ("Convert to use fsl_esdhc_imx for i.MX platforms")
converted FSL_ESDHC to FSL_ESDHC_IMX, but the config check for
apalis_imx6 wasn't updated accordantly.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Peng Fan [Wed, 7 Aug 2019 06:40:53 +0000 (06:40 +0000)]
spl: pass args to board_return_to_bootrom
Pass spl_image and bootdev to board_return_bootrom.
i.MX8MN needs the args to let ROM to load images
Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peng Fan [Tue, 6 Aug 2019 10:05:48 +0000 (10:05 +0000)]
pinctrl: imx: use devfdt_get_addr_size_index
fdtdec_get_addr_size could not parse addr/size correctly is
using address-cells 2 and size-cells 2 on an ARM32 SoC.
So switch to use devfdt_get_addr_size_index.
Peng Fan [Thu, 1 Aug 2019 06:02:41 +0000 (06:02 +0000)]
imx: mx6ul_14x14_evk: Fix SPL boot
When booting SPL on the board, met boot failure:
"
Trying to boot from MMC2
MMC Device 1 not found
spl: could not find mmc device 1. error: -19
SPL: failed to boot from all boot devices
"
Let's register the two mmc controllers in SPL stage to
avoid boot failure.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peng Fan [Thu, 8 Aug 2019 09:55:47 +0000 (09:55 +0000)]
arm: dts: import dts for i.MX6ULZ
Import kernel dts for i.MX6ULZ from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peng Fan [Thu, 8 Aug 2019 09:55:37 +0000 (09:55 +0000)]
arm: dts: sync dts for i.MX6ULL
Sync kernel dts for i.MX6ULL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peng Fan [Thu, 8 Aug 2019 09:55:33 +0000 (09:55 +0000)]
arm: dts: sync dts for i.MX6UL
Sync kernel dts for i.MX6UL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Eugeniy Paltsev [Mon, 7 Oct 2019 16:10:50 +0000 (19:10 +0300)]
NET: DW: fix regression for ARC boards
The commit 642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.
Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.
AKASHI Takahiro [Thu, 22 Aug 2019 07:47:39 +0000 (16:47 +0900)]
cmd: host: fix seg fault at "host info"
With the patch below applied, host_block_dev structure was switched
to be placed in platdata rather than priv. The command "host info"
must be aligned with this change. Otherwise, we will see "Segmentation
Fault."
Fixes: 8f994c860d91 ("sandbox: blk: Switch to use platdata_auto_alloc_size for the driver data") Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Fri, 4 Oct 2019 16:22:43 +0000 (12:22 -0400)]
Merge branch '2019-10-04-master-imports'
- Assorted TI platform fixes
- Revert the change that broke environment flag validation
- Assorted typo fixes
- Assorted Kconfig dependency fixes
- Other minor bug fixes
Adam Ford [Wed, 7 Aug 2019 15:16:33 +0000 (10:16 -0500)]
ARM: dts: imx6q-logicpd: Add missing imx6q-logicpd-u-boot for SPL
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2. This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.
Fixes: 8f4691e31a18 ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")
At this point we are using part number sub-command to retrieve UUID
of the partition using it's name.
e.g.:
part number mmc $mmcdev system_a system_a_index
part uuid mmc $mmcdev:${system_a_index} system_a_uuid
Since 'part uuid' sub-command expects partition index in hex format and
'part number' returns decimal value, 'part uuid' command will provide
wrong UUID or fail.
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 269000 bytes but now needs to be grown to 276000 to make room
for the signatures attached to the board configuration data on High
Security devices.
Simon Glass [Wed, 25 Sep 2019 14:55:50 +0000 (08:55 -0600)]
dm: core: Correct bad cast in ofnode_get_addr_size_index()
At present this code passes an fdt_addr_t pointer as a u64 pointer which
is not safe, since sizeof(fdt_addr_t) may be 4, e.g. with sandbox. Correct
this to avoid a stack corruption problem.
Fixes: e679d03b08 (core: ofnode: Add ofnode_get_addr_size_index) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:46 +0000 (08:55 -0600)]
dm: core: Correct low cell in ofnode_read_pci_addr()
This reads the low cell of the PCI address from the wrong cell. Fix it.
Also fix the function that this code came from.
Fixes: 9e51204527 (dm: core: Add operations on device tree references) Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT) Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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