From: Tom Rini Date: Fri, 1 Mar 2024 18:54:49 +0000 (-0500) Subject: Merge https://source.denx.de/u-boot/custodians/u-boot-snapdragon into next X-Git-Url: http://git.dujemihanovic.xyz/login.html?a=commitdiff_plain;h=b9f5620a477a9e4290aeeddeed50898d49f7a792;p=u-boot.git Merge https://source.denx.de/u-boot/custodians/u-boot-snapdragon into next - Reworks Qualcomm support to be more generic, dropping board specific build targets and relying on DT as the only source of truth - Switches all Qualcomm devices to use upstream devicetree --- b9f5620a477a9e4290aeeddeed50898d49f7a792 diff --cc drivers/gpio/qcom_pmic_gpio.c index 6167c84116,01f9b0d55f..14a8210522 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@@ -215,14 -270,46 +270,46 @@@ static const struct dm_gpio_ops qcom_gp .get_value = qcom_gpio_get_value, .set_value = qcom_gpio_set_value, .get_function = qcom_gpio_get_function, + .xlate = qcom_gpio_xlate, }; + static int qcom_gpio_bind(struct udevice *dev) + { - ++ + struct qcom_pmic_gpio_data *plat = dev_get_plat(dev); + ulong quirks = dev_get_driver_data(dev); + struct udevice *child; + struct driver *drv; + int ret; + + drv = lists_driver_lookup_name("qcom_pmic_pinctrl"); + if (!drv) { + log_warning("Cannot find driver '%s'\n", "qcom_pmic_pinctrl"); + return -ENOENT; + } + + /* Bind the GPIO driver as a child of the PMIC. */ + ret = device_bind_with_driver_data(dev, drv, + dev->name, + quirks, dev_ofnode(dev), &child); + if (ret) + return log_msg_ret("bind", ret); + + dev_set_plat(child, plat); + + return 0; + } + static int qcom_gpio_probe(struct udevice *dev) { - struct qcom_gpio_bank *priv = dev_get_priv(dev); - int reg; + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct qcom_pmic_gpio_data *plat = dev_get_plat(dev); + struct ofnode_phandle_args args; + int val, ret; u64 pid; + plat->pmic = dev->parent; + pid = dev_read_addr(dev); if (pid == FDT_ADDR_T_NONE) return log_msg_ret("bad address", -EINVAL);