From: Prabhakar Kushwaha <prabhakar@freescale.com>
Date: Thu, 26 Dec 2013 07:10:55 +0000 (+0530)
Subject: board/t1040qds: Enable memory reset control
X-Git-Url: http://git.dujemihanovic.xyz/login.html?a=commitdiff_plain;h=8c618dd66adfab736b88a86f51c057b019988a90;p=u-boot.git

board/t1040qds: Enable memory reset control

Define QIXIS_RST_FORCE_MEM to reset on-board DDR-DIMM before start
accessing it.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---

diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c
index 2aa176c7a2..de3ea5c2aa 100644
--- a/board/freescale/t1040qds/t1040qds.c
+++ b/board/freescale/t1040qds/t1040qds.c
@@ -239,3 +239,8 @@ void qixis_dump_switch(void)
 		printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));
 	}
 }
+
+int board_need_mem_reset(void)
+{
+	return 1;
+}
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 8ecf188bd3..7d0bc043f9 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -233,6 +233,7 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
 #define QIXIS_RCFG_CTL_RECONFIG_START	0x21
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
+#define	QIXIS_RST_FORCE_MEM		0x01
 
 #define CONFIG_SYS_CSPR3_EXT	(0xf)
 #define CONFIG_SYS_CSPR3	(CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \