From: Nishanth Menon <nm@ti.com>
Date: Thu, 27 Jul 2023 18:58:45 +0000 (-0500)
Subject: doc: board: ti: am62x/j7200: Update with common boot flow diagram
X-Git-Url: http://git.dujemihanovic.xyz/login.html?a=commitdiff_plain;h=68b3baaf3b3eb943cbb8363a064669527df3c79e;p=u-boot.git

doc: board: ti: am62x/j7200: Update with common boot flow diagram

Update the bootflow svg diagram and reuse across the platforms as they
are common.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---

diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst
index 0a3bbdfaf0..dd697e7091 100644
--- a/doc/board/ti/am62x_sk.rst
+++ b/doc/board/ti/am62x_sk.rst
@@ -42,73 +42,7 @@ Boot Flow:
 ----------
 Below is the pictorial representation of boot flow:
 
-.. code-block:: text
-
- +------------------------------------------------------------------------+
- |        TIFS            |      Main R5          |        A53            |
- +------------------------------------------------------------------------+
- |    +--------+          |                       |                       |
- |    |  Reset |          |                       |                       |
- |    +--------+          |                       |                       |
- |         :              |                       |                       |
- |    +--------+          |   +-----------+       |                       |
- |    | *ROM*  |----------|-->| Reset rls |       |                       |
- |    +--------+          |   +-----------+       |                       |
- |    |        |          |         :             |                       |
- |    |  ROM   |          |         :             |                       |
- |    |services|          |         :             |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |          |   |  *R5 ROM*   |     |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |<---------|---|Load and auth|     |                       |
- |    |        |          |   | tiboot3.bin |     |                       |
- |    +--------+          |   +-------------+     |                       |
- |    |        |<---------|---| Load sysfw  |     |                       |
- |    |        |          |   | part to TIFS|     |                       |
- |    |        |          |   | core        |     |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |          |         :             |                       |
- |    |        |          |         :             |                       |
- |    |        |          |         :             |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |          |   |  *R5 SPL*   |     |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |          |   |    DDR      |     |                       |
- |    |        |          |   |   config    |     |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |          |   |    Load     |     |                       |
- |    |        |          |   |  tispl.bin  |     |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |          |   |   Load R5   |     |                       |
- |    |        |          |   |   firmware  |     |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |<---------|---| Start A53   |     |                       |
- |    |        |          |   | and jump to |     |                       |
- |    |        |          |   | DM fw image |     |                       |
- |    |        |          |   +-------------+     |                       |
- |    |        |          |                       |     +-----------+     |
- |    |        |----------|-----------------------|---->| Reset rls |     |
- |    |        |          |                       |     +-----------+     |
- |    |  TIFS  |          |                       |          :            |
- |    |Services|          |                       |     +-------------+   |
- |    |        |<---------|-----------------------|---->|*TF-A/OP-TEE*|   |
- |    |        |          |                       |     +-------------+   |
- |    |        |          |                       |          :            |
- |    |        |          |                       |     +-----------+     |
- |    |        |<---------|-----------------------|---->| *A53 SPL* |     |
- |    |        |          |                       |     +-----------+     |
- |    |        |          |                       |     |   Load    |     |
- |    |        |          |                       |     | u-boot.img|     |
- |    |        |          |                       |     +-----------+     |
- |    |        |          |                       |          :            |
- |    |        |          |                       |     +-----------+     |
- |    |        |<---------|-----------------------|---->| *U-Boot*  |     |
- |    |        |          |                       |     +-----------+     |
- |    |        |          |                       |     |  prompt   |     |
- |    |        |----------|-----------------------|-----+-----------+-----|
- |    +--------+          |                       |                       |
- |                        |                       |                       |
- +------------------------------------------------------------------------+
+.. image:: img/boot_diagram_k3_current.svg
 
 - Here TIFS acts as master and provides all the critical services. R5/A53
   requests TIFS to get these services done as shown in the above diagram.
diff --git a/doc/board/ti/img/boot_diagram_k3_current.svg b/doc/board/ti/img/boot_diagram_k3_current.svg
new file mode 100644
index 0000000000..995afd890e
--- /dev/null
+++ b/doc/board/ti/img/boot_diagram_k3_current.svg
@@ -0,0 +1,1925 @@
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+               style="box-sizing: border-box; font-size: 0px; text-align: center;"
+               data-drawio-colors="color: rgb(0, 0, 0); ">
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+                 style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); line-height: 1.2; pointer-events: all; white-space: normal; overflow-wrap: normal;">Load u-boot.img</xhtml:div>
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+          </xhtml:div>
+        </foreignObject>
+        <text
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+           y="720"
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+       x="492"
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+       transform="translate(-0.5 -0.5)"
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+           style="overflow: visible; text-align: left;"
+           pointer-events="none"
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+               data-drawio-colors="color: rgb(0, 0, 0); ">
+              <xhtml:div
+                 style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); line-height: 1.2; pointer-events: all; white-space: normal; overflow-wrap: normal;">Load Aux core f/w<xhtml:br />
+(optional)</xhtml:div>
+            </xhtml:div>
+          </xhtml:div>
+        </foreignObject>
+        <text
+           x="544"
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diff --git a/doc/board/ti/j7200_evm.rst b/doc/board/ti/j7200_evm.rst
index 24d309a9ff..5c980bcace 100644
--- a/doc/board/ti/j7200_evm.rst
+++ b/doc/board/ti/j7200_evm.rst
@@ -30,90 +30,7 @@ Boot Flow:
 ----------
 Below is the pictorial representation of boot flow:
 
-.. code-block:: text
-
- +------------------------------------------------------------------------+-----------------------+
- |        DMSC            |      MCU R5           |        A72            |  MAIN R5/C7x          |
- +------------------------------------------------------------------------+-----------------------+
- |    +--------+          |                       |                       |                       |
- |    |  Reset |          |                       |                       |                       |
- |    +--------+          |                       |                       |                       |
- |         :              |                       |                       |                       |
- |    +--------+          |   +-----------+       |                       |                       |
- |    | *ROM*  |----------|-->| Reset rls |       |                       |                       |
- |    +--------+          |   +-----------+       |                       |                       |
- |    |        |          |         :             |                       |                       |
- |    |  ROM   |          |         :             |                       |                       |
- |    |services|          |         :             |                       |                       |
- |    |        |          |   +-------------+     |                       |                       |
- |    |        |          |   |  *R5 ROM*   |     |                       |                       |
- |    |        |          |   +-------------+     |                       |                       |
- |    |        |<---------|---|Load and auth|     |                       |                       |
- |    |        |          |   | tiboot3.bin |     |                       |                       |
- |    | Start  |          |   +-------------+     |                       |                       |
- |    |  TIFS  |<---------|---|    Start    |     |                       |                       |
- |    |        |          |   |    TIFS     |     |                       |                       |
- |    +--------+          |   +-------------+     |                       |                       |
- |        :               |   |             |     |                       |                       |
- |    +---------+         |   |   Load      |     |                       |                       |
- |    | *TIFS*  |         |   |   system    |     |                       |                       |
- |    +---------+         |   | Config data |     |                       |                       |
- |    |         |<--------|---|             |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |         :             |                       |                       |
- |    |         |         |         :             |                       |                       |
- |    |         |         |         :             |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |   |  *R5 SPL*   |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |   |    DDR      |     |                       |                       |
- |    |         |         |   |   config    |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |   |    Load     |     |                       |                       |
- |    |         |         |   |  tispl.bin  |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |   |   Load R5   |     |                       |                       |
- |    |         |         |   |   firmware  |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |<--------|---| Start A72   |     |                       |                       |
- |    |         |         |   | and jump to |     |                       |                       |
- |    |         |         |   | DM fw image |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |---------|-----------------------|---->| Reset rls |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |  TIFS   |         |                       |          :            |                       |
- |    |Services |         |                       |     +-------------+   |                       |
- |    |         |<--------|-----------------------|---->|*TF-A/OP-TEE*|   |                       |
- |    |         |         |                       |     +-------------+   |                       |
- |    |         |         |                       |          :            |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|---->| *A72 SPL* |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |         |                       |     |   Load    |     |                       |
- |    |         |         |                       |     | u-boot.img|     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |         |                       |          :            |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|---->| *U-Boot*  |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |         |                       |     |  prompt   |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |         |                       |     |  Load R5  |     |                       |
- |    |         |         |                       |     |  Firmware |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|-----|  Start R5 |     |      +-----------+    |
- |    |         |---------|-----------------------|-----+-----------+-----|----->| R5 starts |    |
- |    |         |         |                       |     |  Load C7  |     |      +-----------+    |
- |    |         |         |                       |     |  Firmware |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|-----|  Start C7 |     |      +-----------+    |
- |    |         |---------|-----------------------|-----+-----------+-----|----->| C7 starts |    |
- |    |         |         |                       |                       |      +-----------+    |
- |    |         |         |                       |                       |                       |
- |    +---------+         |                       |                       |                       |
- |                        |                       |                       |                       |
- +------------------------------------------------------------------------+-----------------------+
+.. image:: img/boot_diagram_k3_current.svg
 
 - Here DMSC acts as master and provides all the critical services. R5/A72
   requests DMSC to get these services done as shown in the above diagram.