From: Fabio Estevam <festevam@gmail.com>
Date: Thu, 25 Jun 2020 11:14:57 +0000 (-0300)
Subject: ARM: dts: imx6q-tbs2910: Fix Ethernet regression
X-Git-Url: http://git.dujemihanovic.xyz/login.html?a=commitdiff_plain;h=4b78b5bfdae8d655924d01aa332ea179c2885c62;p=u-boot.git

ARM: dts: imx6q-tbs2910: Fix Ethernet regression

Since commit:

commit 6333cbb3817ed551cd7d4e92f7359c73ccc567fc
Author: Michael Walle <michael@walle.cc>
Date:   Thu May 7 00:11:58 2020 +0200

    phy: atheros: ar8035: remove static clock config

    We can configure the clock output in the device tree. Disable the
    hardcoded one in here. This is highly board-specific and should have
    never been enabled in the PHY driver.

    If bisecting shows that this commit breaks your board it probably
    depends on the clock output of your Atheros AR8035 PHY. Please have a
    look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
    "clk-out-frequency = <125000000>" because that value was the hardcoded
    value until this commit.

    Signed-off-by: Michael Walle <michael@walle.cc>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>

, the clock output setting for the AR803x driver is removed from being
hardcoded in the PHY driver and should be passed via device tree instead.

Update the device tree with the "qca,clk-out-frequency" property so that
Ethernet can work again.

Reported-by: Soeren Moch <smoch@web.de>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Soeren Moch <smoch@web.de>
---

diff --git a/arch/arm/dts/imx6q-tbs2910.dts b/arch/arm/dts/imx6q-tbs2910.dts
index cc5df37b46..7d0a0676ff 100644
--- a/arch/arm/dts/imx6q-tbs2910.dts
+++ b/arch/arm/dts/imx6q-tbs2910.dts
@@ -107,7 +107,18 @@
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii-id";
 	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+	phy-handle = <&phy>;
 	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy: ethernet-phy@4 {
+			reg = <4>;
+			qca,clk-out-frequency = <125000000>;
+		};
+	};
 };
 
 &hdmi {