clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags

Add the implementation for the CLK_GATE_SETCLR_INV and
CLK_GATE_NO_SETCLR flags.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 870b14ed8b260cfd59f3edf53b507437ccc35784..6c6b500d9b71156e977acc37413f7c22413764b4 100644 (file)
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -390,6 +390,12 @@ static int mtk_clk_gate_enable(struct clk *clk)
        case CLK_GATE_SETCLR:
                writel(bit, priv->base + gate->regs->clr_ofs);
                break;
+       case CLK_GATE_SETCLR_INV:
+               writel(bit, priv->base + gate->regs->set_ofs);
+               break;
+       case CLK_GATE_NO_SETCLR:
+               clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, 0);
+               break;
        case CLK_GATE_NO_SETCLR_INV:
                clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, bit);
                break;
@@ -411,6 +417,12 @@ static int mtk_clk_gate_disable(struct clk *clk)
        case CLK_GATE_SETCLR:
                writel(bit, priv->base + gate->regs->set_ofs);
                break;
+       case CLK_GATE_SETCLR_INV:
+               writel(bit, priv->base + gate->regs->clr_ofs);
+               break;
+       case CLK_GATE_NO_SETCLR:
+               clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, bit);
+               break;
        case CLK_GATE_NO_SETCLR_INV:
                clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, 0);
                break;