pci: mpc85xx: Allow 8/16-bit access to PCI config space

This Freescale mpc85xx PCI controller should support 8-bit and 16-bit read
and write access to PCI config space as described in more Freescale
reference manuals.

This change fixes issue that 8-bit and 16-bit write to PCI config space
caused to clear adjacent bits of 32-bit PCI register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>

diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c
index 23f14db830183e8ecfddc8e3d533d59304152388..d144f2b791b81329e356def3cd96fd09de121e54 100644 (file)
--- a/drivers/pci/pci_mpc85xx.c
+++ b/drivers/pci/pci_mpc85xx.c
@@ -25,7 +25,18 @@ static int mpc85xx_pci_dm_read_config(const struct udevice *dev, pci_dev_t bdf,
        addr = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset);
        out_be32(priv->cfg_addr, addr);
        sync();
-       *value = pci_conv_32_to_size(in_le32(priv->cfg_data), offset, size);
+
+       switch (size) {
+       case PCI_SIZE_8:
+               *value = in_8(priv->cfg_data + (offset & 3));
+               break;
+       case PCI_SIZE_16:
+               *value = in_le16(priv->cfg_data + (offset & 2));
+               break;
+       case PCI_SIZE_32:
+               *value = in_le32(priv->cfg_data);
+               break;
+       }
 
        return 0;
 }
@@ -40,7 +51,18 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf,
        addr = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset);
        out_be32(priv->cfg_addr, addr);
        sync();
-       out_le32(priv->cfg_data, pci_conv_size_to_32(0, value, offset, size));
+
+       switch (size) {
+       case PCI_SIZE_8:
+               out_8(priv->cfg_data + (offset & 3), value);
+               break;
+       case PCI_SIZE_16:
+               out_le16(priv->cfg_data + (offset & 2), value);
+               break;
+       case PCI_SIZE_32:
+               out_le32(priv->cfg_data, value);
+               break;
+       }
        sync();
 
        return 0;