imx: imx8ulp: Get chip revision from Sentinel

In both SPL and u-boot, after probing the S400 MU, get the chip revision,
lifecycle and UID from Sentinel.
Update get_cpu_rev to use the chip revision not hard coded it for A0

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/include/asm/arch-imx8ulp/imx-regs.h b/arch/arm/include/asm/arch-imx8ulp/imx-regs.h
index 723bab584c37b5997b8f69762589b858ecf20e74..9a5d76e2102789fb182b08c02efaba29082a540b 100644 (file)
--- a/arch/arm/include/asm/arch-imx8ulp/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8ulp/imx-regs.h
@@ -10,6 +10,7 @@
 #include <linux/bitops.h>
 #include <linux/sizes.h>
 
+#define SRAM0_BASE          0x22010000
 #define PBRIDGE0_BASE          0x28000000
 
 #define CMC0_RBASE             0x28025000

diff --git a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
index a7869fbb5732f891af5d8b12e85b528f1c334f8e..ff49c626d820279679f7c0860b7fd555b94fb6b9 100644 (file)
--- a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
@@ -15,4 +15,5 @@ void set_lpav_qos(void);
 void load_lposc_fuse(void);
 bool m33_image_booted(void);
 int m33_image_handshake(ulong timeout_ms);
+int imx8ulp_dm_post_init(void);
 #endif

diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 3498cf9c88a37de8ed8ec19a958a0fc0291d08ad..9b12d3d1ad2946dbd92db607155a9e87a5d5da61 100644 (file)
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -70,9 +70,18 @@ int mmc_get_env_dev(void)
 }
 #endif
 
+static void set_cpu_info(struct sentinel_get_info_data *info)
+{
+       gd->arch.soc_rev = info->soc;
+       gd->arch.lifecycle = info->lc;
+       memcpy((void *)&gd->arch.uid, &info->uid, 4 * sizeof(u32));
+}
+
 u32 get_cpu_rev(void)
 {
-       return (MXC_CPU_IMX8ULP << 12) | CHIP_REV_1_0;
+       u32 rev = (gd->arch.soc_rev >> 24) - 0xa0;
+
+       return (MXC_CPU_IMX8ULP << 12) | (CHIP_REV_1_0 + rev);
 }
 
 enum bt_mode get_boot_mode(void)
@@ -670,10 +679,12 @@ int arch_cpu_init(void)
        return 0;
 }
 
-static int imx8ulp_check_mu(void *ctx, struct event *event)
+int imx8ulp_dm_post_init(void)
 {
        struct udevice *devp;
        int ret;
+       u32 res;
+       struct sentinel_get_info_data *info = (struct sentinel_get_info_data *)SRAM0_BASE;
 
        ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(imx8ulp_mu), &devp);
        if (ret) {
@@ -681,9 +692,24 @@ static int imx8ulp_check_mu(void *ctx, struct event *event)
                return ret;
        }
 
+       ret = ahab_get_info(info, &res);
+       if (ret) {
+               printf("ahab_get_info failed %d\n", ret);
+               /* fallback to A0.1 revision */
+               memset((void *)info, 0, sizeof(struct sentinel_get_info_data));
+               info->soc = 0xa000084d;
+       }
+
+       set_cpu_info(info);
+
        return 0;
 }
-EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_check_mu);
+
+static int imx8ulp_evt_dm_post_init(void *ctx, struct event *event)
+{
+       return imx8ulp_dm_post_init();
+}
+EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_evt_dm_post_init);
 
 #if defined(CONFIG_SPL_BUILD)
 __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)

diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c
index e672f6ee6cb19b387ba3f4e0d3bb0ff83df3d7bb..2a96bd07dc0fdb71b409728ae6b0c6481678e42a 100644 (file)
--- a/board/freescale/imx8ulp_evk/spl.c
+++ b/board/freescale/imx8ulp_evk/spl.c
@@ -77,16 +77,12 @@ void display_ele_fw_version(void)
 
 void spl_board_init(void)
 {
-       struct udevice *dev;
        u32 res;
        int ret;
 
-       uclass_find_first_device(UCLASS_MISC, &dev);
-
-       for (; dev; uclass_find_next_device(&dev)) {
-               if (device_probe(dev))
-                       continue;
-       }
+       ret = imx8ulp_dm_post_init();
+       if (ret)
+               return;
 
        board_early_init_f();