return 0;
}
-static void decode_regions(struct pci_controller *hose, ofnode parent_node,
+static int decode_regions(struct pci_controller *hose, ofnode parent_node,
ofnode node)
{
int pci_addr_cells, addr_cells, size_cells;
prop = ofnode_get_property(node, "ranges", &len);
if (!prop) {
debug("%s: Cannot decode regions\n", __func__);
- return;
+ return -EINVAL;
}
pci_addr_cells = ofnode_read_simple_addr_cells(node);
max_regions = len / cells_per_record + CONFIG_NR_DRAM_BANKS;
hose->regions = (struct pci_region *)
calloc(1, max_regions * sizeof(struct pci_region));
+ if (!hose->regions)
+ return -ENOMEM;
for (i = 0; i < max_regions; i++, len -= cells_per_record) {
u64 pci_addr, addr, size;
/* Add a region for our local memory */
bd = gd->bd;
if (!bd)
- return;
+ return 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
if (bd->bi_dram[i].size) {
}
}
- return;
+ return 0;
}
static int pci_uclass_pre_probe(struct udevice *bus)
/* For bridges, use the top-level PCI controller */
if (!device_is_on_pci_bus(bus)) {
hose->ctlr = bus;
- decode_regions(hose, dev_ofnode(bus->parent), dev_ofnode(bus));
+ ret = decode_regions(hose, dev_ofnode(bus->parent),
+ dev_ofnode(bus));
+ if (ret)
+ return ret;
} else {
struct pci_controller *parent_hose;