arm64: zynqmp: Align nvmem-fw node with dt-schema

Node name has to be renamed to be aligned with dt-schema and also
xlnx,zynqmp-nvmem-fw switched to fixed-layout.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/32899b20c1e282aab16c32074b1c9a3f45f6dac8.1706791116.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index e539fa329e19b41ece7ba73e91169bc0821362b8..b50b83b7723fe938c171d6ee0c2c58c2a871c1d8 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -207,68 +207,71 @@
                                mbox-names = "tx", "rx";
                        };
 
-                       nvmem-firmware {
+                       soc-nvmem {
                                compatible = "xlnx,zynqmp-nvmem-fw";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               soc_revision: soc-revision@0 {
-                                       reg = <0x0 0x4>;
-                               };
-                               /* efuse access */
-                               efuse_dna: efuse-dna@c {
-                                       reg = <0xc 0xc>;
-                               };
-                               efuse_usr0: efuse-usr0@20 {
-                                       reg = <0x20 0x4>;
-                               };
-                               efuse_usr1: efuse-usr1@24 {
-                                       reg = <0x24 0x4>;
-                               };
-                               efuse_usr2: efuse-usr2@28 {
-                                       reg = <0x28 0x4>;
-                               };
-                               efuse_usr3: efuse-usr3@2c {
-                                       reg = <0x2c 0x4>;
-                               };
-                               efuse_usr4: efuse-usr4@30 {
-                                       reg = <0x30 0x4>;
-                               };
-                               efuse_usr5: efuse-usr5@34 {
-                                       reg = <0x34 0x4>;
-                               };
-                               efuse_usr6: efuse-usr6@38 {
-                                       reg = <0x38 0x4>;
-                               };
-                               efuse_usr7: efuse-usr7@3c {
-                                       reg = <0x3c 0x4>;
-                               };
-                               efuse_miscusr: efuse-miscusr@40 {
-                                       reg = <0x40 0x4>;
-                               };
-                               efuse_chash: efuse-chash@50 {
-                                       reg = <0x50 0x4>;
-                               };
-                               efuse_pufmisc: efuse-pufmisc@54 {
-                                       reg = <0x54 0x4>;
-                               };
-                               efuse_sec: efuse-sec@58 {
-                                       reg = <0x58 0x4>;
-                               };
-                               efuse_spkid: efuse-spkid@5c {
-                                       reg = <0x5c 0x4>;
-                               };
-                               efuse_aeskey: efuse-aeskey@60 {
-                                       reg = <0x60 0x20>;
-                               };
-                               efuse_ppk0hash: efuse-ppk0hash@a0 {
-                                       reg = <0xa0 0x30>;
-                               };
-                               efuse_ppk1hash: efuse-ppk1hash@d0 {
-                                       reg = <0xd0 0x30>;
-                               };
-                               efuse_pufuser: efuse-pufuser@100 {
-                                       reg = <0x100 0x7F>;
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       soc_revision: soc-revision@0 {
+                                               reg = <0x0 0x4>;
+                                       };
+                                       /* efuse access */
+                                       efuse_dna: efuse-dna@c {
+                                               reg = <0xc 0xc>;
+                                       };
+                                       efuse_usr0: efuse-usr0@20 {
+                                               reg = <0x20 0x4>;
+                                       };
+                                       efuse_usr1: efuse-usr1@24 {
+                                               reg = <0x24 0x4>;
+                                       };
+                                       efuse_usr2: efuse-usr2@28 {
+                                               reg = <0x28 0x4>;
+                                       };
+                                       efuse_usr3: efuse-usr3@2c {
+                                               reg = <0x2c 0x4>;
+                                       };
+                                       efuse_usr4: efuse-usr4@30 {
+                                               reg = <0x30 0x4>;
+                                       };
+                                       efuse_usr5: efuse-usr5@34 {
+                                               reg = <0x34 0x4>;
+                                       };
+                                       efuse_usr6: efuse-usr6@38 {
+                                               reg = <0x38 0x4>;
+                                       };
+                                       efuse_usr7: efuse-usr7@3c {
+                                               reg = <0x3c 0x4>;
+                                       };
+                                       efuse_miscusr: efuse-miscusr@40 {
+                                               reg = <0x40 0x4>;
+                                       };
+                                       efuse_chash: efuse-chash@50 {
+                                               reg = <0x50 0x4>;
+                                       };
+                                       efuse_pufmisc: efuse-pufmisc@54 {
+                                               reg = <0x54 0x4>;
+                                       };
+                                       efuse_sec: efuse-sec@58 {
+                                               reg = <0x58 0x4>;
+                                       };
+                                       efuse_spkid: efuse-spkid@5c {
+                                               reg = <0x5c 0x4>;
+                                       };
+                                       efuse_aeskey: efuse-aeskey@60 {
+                                               reg = <0x60 0x20>;
+                                       };
+                                       efuse_ppk0hash: efuse-ppk0hash@a0 {
+                                               reg = <0xa0 0x30>;
+                                       };
+                                       efuse_ppk1hash: efuse-ppk1hash@d0 {
+                                               reg = <0xd0 0x30>;
+                                       };
+                                       efuse_pufuser: efuse-pufuser@100 {
+                                               reg = <0x100 0x7F>;
+                                       };
                                };
                        };