void at91_mck_init(u32 mckr);
void at91_mck_init_down(u32 mckr);
void at91_pmc_init(void);
-void mem_init(void);
+void at91_mem_init(void);
void at91_phy_reset(void);
void at91_sdram_hw_init(void);
void at91_mck_init(u32 mckr);
preloader_console_init();
#endif
- mem_init();
+ at91_mem_init();
at91_spl_board_init();
}
board_early_init_f();
- mem_init();
+ at91_mem_init();
ret = spl_init();
if (ret) {
2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct atmel_mpddrc_config ddr2;
2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
(8 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
ddrc->cal_mr4 |= ATMEL_MPDDRC_CAL_MR4_MR4R(0xFFFE);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
(7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
8 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct atmel_mpddrc_config ddr2;
8 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct atmel_mpddrc_config ddr2;
8 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct atmel_mpddrc_config ddr2;
8 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct atmel_mpddrc_config ddr2;
const struct atmel_mpddr *mpddr = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
(8 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
}
-void mem_init(void)
+void at91_mem_init(void)
{
struct atmel_mpddrc_config ddr2;
| AT91_SDRAMC_TRP_VAL(2) | AT91_SDRAMC_TRCD_VAL(2) \
| AT91_SDRAMC_TRAS_VAL(5) | AT91_SDRAMC_TXSR_VAL(8))
-void mem_init(void)
+void at91_mem_init(void)
{
struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
struct at91_port *port = (struct at91_port *)ATMEL_BASE_PIOC;
sdramc_initialize(ATMEL_BASE_CS1, &setting);
}
-void mem_init(void)
+void at91_mem_init(void)
{
unsigned int ram_size = 0;