rockchip: px30: add support for setting cpll clock

Starting with commit 92f1e9a4b31c ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 617ce0dce5ace541f775464f81321b6ac8e4bcaf..ea874e3f4b9147da375c7ea2db557ad714fe9d9d 100644 (file)
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1291,6 +1291,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
        case PLL_NPLL:
                ret = px30_clk_set_pll_rate(priv, NPLL, rate);
                break;
+       case PLL_CPLL:
+               ret = px30_clk_set_pll_rate(priv, CPLL, rate);
+               break;
        case ARMCLK:
                ret = px30_armclk_set_clk(priv, rate);
                break;