typedef void __noreturn (*image_entry_noargs_t)(void);
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
u32 loadaddr = 0;
- int ret, size = 0;
+ int ret, size = 0, shut_cpu = 0;
/* Release all the exclusive devices held by SPL before starting ATF */
ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
if (ret)
panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
- /* Add an extra newline to differentiate the ATF logs from SPL */
- printf("Starting ATF on ARM64 core...\n\n");
-
- ret = rproc_start(1);
- if (ret)
- panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
if (!fit_image_info[IMAGE_ID_DM_FW].image_len &&
!(size > 0 && valid_elf_image(loadaddr))) {
- debug("Shutting down...\n");
- release_resources_for_core_shutdown();
-
- while (1)
- asm volatile("wfe");
+ shut_cpu = 1;
+ goto start_arm64;
}
if (!fit_image_info[IMAGE_ID_DM_FW].image_start) {
debug("%s: jumping to address %x\n", __func__, loadaddr);
+start_arm64:
+ /* Add an extra newline to differentiate the ATF logs from SPL */
+ printf("Starting ATF on ARM64 core...\n\n");
+
+ ret = rproc_start(1);
+ if (ret)
+ panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
+
+ if (shut_cpu) {
+ debug("Shutting down...\n");
+ release_resources_for_core_shutdown();
+
+ while (1)
+ asm volatile("wfe");
+ }
image_entry_noargs_t image_entry = (image_entry_noargs_t)loadaddr;
image_entry();