]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: mx5: Add LDB clock config code
authorMarek Vasut <marex@denx.de>
Wed, 10 Oct 2018 08:40:02 +0000 (10:40 +0200)
committerStefano Babic <sbabic@denx.de>
Tue, 16 Oct 2018 08:34:02 +0000 (10:34 +0200)
Add code to configure PLL4, from which the LDB clock are directly
derived.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
arch/arm/include/asm/arch-mx5/clock.h
arch/arm/mach-imx/mx5/clock.c

index 0ecbdeede5135d631eaaf48c1c61632eb1af84e9..6f5ca5888aeaaa6d78230abfadf5dea024d50127 100644 (file)
@@ -38,6 +38,7 @@ enum mxc_clock {
        MXC_NFC_CLK,
        MXC_PERIPH_CLK,
        MXC_I2C_CLK,
+       MXC_LDB_CLK,
 };
 
 u32 imx_get_uartclk(void);
index 427cb1241582881ffcbbd36203f1d401e9d49f28..2fabdd2eae8ed8c93ed1d60bb4832eeac7cc35a3 100644 (file)
@@ -838,6 +838,31 @@ static int config_ddr_clk(u32 emi_clk)
        return 0;
 }
 
+#ifdef CONFIG_MX53
+static int config_ldb_clk(u32 ref, u32 freq)
+{
+       int ret = 0;
+       struct pll_param pll_param;
+
+       memset(&pll_param, 0, sizeof(struct pll_param));
+
+       ret = calc_pll_params(ref, freq, &pll_param);
+       if (ret != 0) {
+               printf("Error:Can't find pll parameters: %d\n",
+                       ret);
+               return ret;
+       }
+
+       return config_pll_clk(PLL4_CLOCK, &pll_param);
+}
+#else
+static int config_ldb_clk(u32 ref, u32 freq)
+{
+       /* Platform not supported */
+       return -EINVAL;
+}
+#endif
+
 /*
  * This function assumes the expected core clock has to be changed by
  * modifying the PLL. This is NOT true always but for most of the times,
@@ -879,6 +904,10 @@ int mxc_set_clock(u32 ref, u32 freq, enum mxc_clock clk)
                if (config_nfc_clk(freq))
                        return -EINVAL;
                break;
+       case MXC_LDB_CLK:
+               if (config_ldb_clk(ref, freq))
+                       return -EINVAL;
+               break;
        default:
                printf("Warning:Unsupported or invalid clock type\n");
        }