U-Boot support for the CL-SOM-AM57x module is no longer required.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
+++ /dev/null
-/*
- * Support for CompuLab CL-SOM-AM57x System-on-Module
- *
- * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include "dra74x.dtsi"
-
-/ {
- model = "CompuLab CL-SOM-AM57x";
- compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&leds_pins_default>;
-
- led0 {
- label = "cl-som-am57x:green";
- gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- default-state = "off";
- };
- };
-
- vdd_3v3: fixedregulator-vdd_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vdd_3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ads7846reg: fixedregulator-ads7846-reg {
- compatible = "regulator-fixed";
- regulator-name = "ads7846-reg";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- sound0: sound0 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "CL-SOM-AM57x-Sound-Card";
- simple-audio-card,format = "i2s";
- simple-audio-card,bitclock-master = <&dailink0_master>;
- simple-audio-card,frame-master = <&dailink0_master>;
- simple-audio-card,widgets =
- "Headphone", "Headphone Jack",
- "Microphone", "Microphone Jack",
- "Line", "Line Jack";
- simple-audio-card,routing =
- "Headphone Jack", "RHPOUT",
- "Headphone Jack", "LHPOUT",
- "LLINEIN", "Line Jack",
- "MICIN", "Mic Bias",
- "Mic Bias", "Microphone Jack";
-
- dailink0_master: simple-audio-card,cpu {
- sound-dai = <&mcasp3>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&wm8731>;
- system-clock-frequency = <12000000>;
- };
- };
-};
-
-&dra7_pmx_core {
- leds_pins_default: leds_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */
- >;
- };
-
- i2c1_pins_default: i2c1_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
- DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
- >;
- };
-
- i2c3_pins_default: i2c3_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
- DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
- >;
- };
-
- i2c4_pins_default: i2c4_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */
- DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */
- >;
- };
-
- tps659038_pins_default: tps659038_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
- >;
- };
-
- mmc2_pins_default: mmc2_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
- DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
- DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
- DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
- DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
- DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
- DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
- DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
- DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
- DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
- >;
- };
-
- qspi1_pins: pinmux_qspi1_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
- DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */
- DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d1 */
- DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
- DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
- DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
- >;
- };
-
- cpsw_pins_default: cpsw_pins_default {
- pinctrl-single,pins = <
- /* Slave at addr 0x0 */
- DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */
- DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tctl */
- DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3 */
- DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td2 */
- DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td1 */
- DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td0 */
- DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */
- DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */
- DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */
- DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */
- DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */
- DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */
-
- /* Slave at addr 0x1 */
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_tclk */
- DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
- DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
- DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
- DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
- DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
- DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
- DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
- DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
- DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
- DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
- DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
- >;
- };
-
- cpsw_pins_sleep: cpsw_pins_sleep {
- pinctrl-single,pins = <
- /* Slave 1 */
- DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
-
- /* Slave 2 */
- DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
- >;
- };
-
- davinci_mdio_pins_default: davinci_mdio_pins_default {
- pinctrl-single,pins = <
- /* MDIO */
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */
- DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */
- >;
- };
-
- davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15)
- >;
- };
-
- ads7846_pins: pinmux_ads7846_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */
- >;
- };
-
- mcasp3_pins_default: mcasp3_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
- DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
- DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
- DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
- >;
- };
-
- mcasp3_pins_sleep: mcasp3_pins_sleep {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
- DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
- >;
- };
-};
-
-&i2c1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_default>;
- clock-frequency = <400000>;
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c3_pins_default>;
- clock-frequency = <400000>;
-};
-
-&i2c4 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c4_pins_default>;
- clock-frequency = <400000>;
-
- tps659038: tps659038@58 {
- compatible = "ti,tps659038";
- reg = <0x58>;
- interrupt-parent = <&gpio1>;
- interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&tps659038_pins_default>;
-
- #interrupt-cells = <2>;
- interrupt-controller;
-
- ti,system-power-controller;
-
- tps659038_pmic {
- compatible = "ti,tps659038-pmic";
-
- regulators {
- smps12_reg: smps12 {
- /* VDD_MPU */
- regulator-name = "smps12";
- regulator-min-microvolt = < 850000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps3_reg: smps3 {
- /* VDD_DDR */
- regulator-name = "smps3";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps45_reg: smps45 {
- /* VDD_DSPEVE */
- regulator-name = "smps45";
- regulator-min-microvolt = < 850000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps6_reg: smps6 {
- /* VDD_GPU */
- regulator-name = "smps6";
- regulator-min-microvolt = < 850000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps7_reg: smps7 {
- /* VDD_CORE */
- regulator-name = "smps7";
- regulator-min-microvolt = < 850000>;
- regulator-max-microvolt = <1160000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps8_reg: smps8 {
- /* VDD_IVA */
- regulator-name = "smps8";
- regulator-min-microvolt = < 850000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps9_reg: smps9 {
- /* PMIC_3V3 */
- regulator-name = "smps9";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
-
- ldo1_reg: ldo1 {
- /* VDD_SD / VDDSHV8 */
- regulator-name = "ldo1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo2_reg: ldo2 {
- /* VDD_1V8 */
- regulator-name = "ldo2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo3_reg: ldo3 {
- /* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */
- regulator-name = "ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo4_reg: ldo4 {
- /* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */
- regulator-name = "ldo4";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo9_reg: ldo9 {
- /* VDD_RTC */
- regulator-name = "ldo9";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldoln_reg: ldoln {
- /* VDDA_1V8_PLL */
- regulator-name = "ldoln";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldousb_reg: ldousb {
- /* VDDA_3V_USB: VDDA_USBHS33 */
- regulator-name = "ldousb";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- /* regen1 not used */
- };
- };
-
- tps659038_pwr_button: tps659038_pwr_button {
- compatible = "ti,palmas-pwrbutton";
- interrupt-parent = <&tps659038>;
- interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
- wakeup-source;
- ti,palmas-long-press-seconds = <12>;
- };
-
- tps659038_gpio: tps659038_gpio {
- compatible = "ti,palmas-gpio";
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
-
- rtc0: rtc@56 {
- compatible = "emmicro,em3027";
- reg = <0x56>;
- };
-
- eeprom_module: atmel@50 {
- compatible = "atmel,24c08";
- reg = <0x50>;
- pagesize = <16>;
- };
-
- wm8731: wm8731@1a {
- #sound-dai-cells = <0>;
- compatible = "wlf,wm8731";
- reg = <0x1a>;
- status = "okay";
- };
-};
-
-&cpu0 {
- cpu0-supply = <&smps12_reg>;
- voltage-tolerance = <1>;
-};
-
-&sata {
- status = "okay";
-};
-
-&mailbox5 {
- status = "okay";
- mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
- status = "okay";
- };
- mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
- status = "okay";
- };
-};
-
-&mailbox6 {
- status = "okay";
- mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
- status = "okay";
- };
- mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
- status = "okay";
- };
-};
-
-&mmc2 {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_pins_default>;
-
- vmmc-supply = <&vdd_3v3>;
- bus-width = <8>;
- ti,non-removable;
- cap-mmc-dual-data-rate;
-};
-
-&qspi {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&qspi1_pins>;
-
- spi-max-frequency = <48000000>;
-
- spi_flash: spi_flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "spansion,m25p80", "jedec,spi-nor";
- reg = <0>; /* CS0 */
- spi-max-frequency = <48000000>;
-
- partition@0 {
- label = "uboot";
- reg = <0x0 0xc0000>;
- };
-
- partition@c0000 {
- label = "uboot environment";
- reg = <0xc0000 0x40000>;
- };
-
- partition@100000 {
- label = "reserved";
- reg = <0x100000 0x0>;
- };
- };
-
- /* touch controller */
- ads7846@0 {
- pinctrl-names = "default";
- pinctrl-0 = <&ads7846_pins>;
-
- compatible = "ti,ads7846";
- vcc-supply = <&ads7846reg>;
-
- reg = <1>; /* CS1 */
- spi-max-frequency = <1500000>;
-
- interrupt-parent = <&gpio1>;
- interrupts = <31 0>;
- pendown-gpio = <&gpio1 31 0>;
-
-
- ti,x-min = /bits/ 16 <0x0>;
- ti,x-max = /bits/ 16 <0x0fff>;
- ti,y-min = /bits/ 16 <0x0>;
- ti,y-max = /bits/ 16 <0x0fff>;
-
- ti,x-plate-ohms = /bits/ 16 <180>;
- ti,pressure-max = /bits/ 16 <255>;
-
- ti,debounce-max = /bits/ 16 <30>;
- ti,debounce-tol = /bits/ 16 <10>;
- ti,debounce-rep = /bits/ 16 <1>;
-
- wakeup-source;
- };
-};
-
-&mac {
- status = "okay";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&cpsw_pins_default>;
- pinctrl-1 = <&cpsw_pins_sleep>;
- dual_emac;
-};
-
-&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
- phy-mode = "rgmii-txid";
- dual_emac_res_vlan = <0>;
-};
-
-&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
- phy-mode = "rgmii-txid";
- dual_emac_res_vlan = <1>;
-};
-
-&davinci_mdio {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&davinci_mdio_pins_default>;
- pinctrl-1 = <&davinci_mdio_pins_sleep>;
-};
-
-&usb2_phy1 {
- phy-supply = <&ldousb_reg>;
-};
-
-&usb2_phy2 {
- phy-supply = <&ldousb_reg>;
-};
-
-&usb1 {
- dr_mode = "host";
-};
-
-&usb2 {
- dr_mode = "host";
-};
-
-&mcasp3 {
- #sound-dai-cells = <0>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&mcasp3_pins_default>;
- pinctrl-1 = <&mcasp3_pins_sleep>;
- status = "okay";
-
- op-mode = <0>; /* MCASP_IIS_MODE */
- tdm-slots = <2>;
- /* 4 serializers */
- serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
- 1 2 0 0
- >;
-};
-
-&gpio3 {
- status = "okay";
- ti,no-reset-on-init;
-};
-
-&gpio2 {
- status = "okay";
- ti,no-reset-on-init;
-};
+++ /dev/null
-/*
- * Support for CompuLab SBC-AM57x single board computer
- *
- * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-
-#include "am57xx-cl-som-am57x.dts"
-#include "compulab-sb-som.dtsi"
-
-/ {
- model = "CompuLab CL-SOM-AM57x on SB-SOM-AM57x";
- compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
-
- aliases {
- display0 = &lcd0;
- display1 = &hdmi;
- };
-};
-
-&dra7_pmx_core {
- uart3_pins_default: uart3_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
- DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
- >;
- };
-
- mmc1_pins_default: mmc1_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
- DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
- DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
- DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
- DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
- DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
- DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1_sdcd.gpio6_27 */
- DRA7XX_CORE_IOPAD(0x377c, PIN_INPUT | MUX_MODE14) /* mmc1_sdwp.gpio6_28 */
- >;
- };
-
- usb1_pins: pinmux_usb1_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
- >;
- };
-
- i2c5_pins_default: i2c5_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT| MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
- DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT| MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
- >;
- };
-
- lcd_pins_default: lcd_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT | MUX_MODE14) /* vin2a_vsync0.gpio4_0 */
- >;
- };
-
- hdmi_pins: pinmux_hdmi_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
- DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
- >;
- };
-
- hdmi_conn_pins: pinmux_hdmi_conn_pins {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT | MUX_MODE14) /* spi1_cs2.gpio7_12 */
- >;
- };
-};
-
-&uart3 {
- status = "okay";
- interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
- <&dra7_pmx_core 0x3f8>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&uart3_pins_default>;
-};
-
-&mmc1 {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_default>;
-
- vmmc-supply = <&ldo1_reg>;
- bus-width = <4>;
- cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpio6 28 GPIO_ACTIVE_HIGH>;
-};
-
-&usb1 {
- pinctrl-names = "default";
- pinctrl-0 = <&usb1_pins>;
-};
-
-&i2c5 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c5_pins_default>;
- clock-frequency = <400000>;
-
- eeprom_base: atmel@54 {
- compatible = "atmel,24c08";
- reg = <0x54>;
- pagesize = <16>;
- };
-
- pca9555: pca9555@20 {
- compatible = "nxp,pca9555";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-};
-
-&dss {
- status = "ok";
-
- vdda_video-supply = <&ldoln_reg>;
-
- port {
- dpi_lcd_out: endpoint {
- remote-endpoint = <&lcd_in>;
- data-lines = <24>;
- };
- };
-};
-
-&lcd0 {
- pinctrl-names = "default";
- pinctrl-0 = <&lcd_pins_default>;
-
- enable-gpios = <&pca9555 14 GPIO_ACTIVE_HIGH
- &gpio4 0 GPIO_ACTIVE_HIGH>;
-
- port {
- lcd_in: endpoint {
- remote-endpoint = <&dpi_lcd_out>;
- data-lines = <24>;
- };
- };
-};
-
-&hdmi {
- status = "ok";
- vdda-supply = <&ldo4_reg>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_pins>;
-
- port {
- hdmi_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- lanes = <1 0 3 2 5 4 7 6>;
- };
- };
-};
-
-&hdmi_conn {
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_conn_pins>;
-
- hpd-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_out>;
- };
- };
-};
prompt "OMAP5 board select"
optional
-config TARGET_CL_SOM_AM57X
- bool "CompuLab CL-SOM-AM57x"
- select DRA7XX
-
config TARGET_CM_T54
bool "CompuLab CM-T54"
endmenu
endif
-source "board/compulab/cl-som-am57x/Kconfig"
source "board/compulab/cm_t54/Kconfig"
source "board/ti/omap5_uevm/Kconfig"
source "board/ti/dra7xx/Kconfig"
+++ /dev/null
-if TARGET_CL_SOM_AM57X
-
-config SYS_BOARD
- default "cl-som-am57x"
-
-config SYS_VENDOR
- default "compulab"
-
-config SYS_CONFIG_NAME
- default "cl-som-am57x"
-
-endif
+++ /dev/null
-CL-SOM-AM57x BOARD
-M: Uri Mashiach <uri.mashiach@compulab.co.il>
-S: Maintained
-F: board/compulab/cl-som-am57x/
-F: include/configs/cl-som-am57x.h
-F: configs/cl-som-am57x_defconfig
+++ /dev/null
-#
-# Makefile
-#
-# (C) Copyright 2016 CompuLab, Ltd. <www.compulab.co.il>
-#
-# Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-ifdef CONFIG_SPL_BUILD
-obj-y += spl.o mux.o
-else
-obj-y += cl-som-am57x.o mux.o
-endif
-
-obj-$(CONFIG_DRIVER_TI_CPSW) += eth.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Board functions for CompuLab cl_som_am57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-
-#include <common.h>
-#include <palmas.h>
-#include <usb.h>
-#include <asm/gpio.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/sys_proto.h>
-#include "../common/common.h"
-#include "../common/eeprom.h"
-#include <asm/omap_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const struct omap_sysinfo sysinfo = {
- "Board: CL-SOM-AM57x\n"
-};
-
-int board_init(void)
-{
- /* Disable PMIC Powerhold feature, DEV_CTRL.DEV_ON = 1 */
- palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
-
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
- return 0;
-}
-
-#ifdef CONFIG_MMC
-#define SB_SOM_CD_GPIO 187
-#define SB_SOM_WP_GPIO 188
-
-int board_mmc_init(bd_t *bis)
-{
- int ret0, ret1;
-
- ret0 = omap_mmc_init(0, 0, 0, SB_SOM_CD_GPIO, SB_SOM_WP_GPIO);
- if (ret0)
- printf("cl-som-am57x: failed to initialize mmc0\n");
-
- ret1 = omap_mmc_init(1, 0, 0, -1, -1);
- if (ret1)
- printf("cl-som-am57x: failed to initialize mmc1\n");
-
- return ret0 && ret1;
-}
-#endif /* CONFIG_MMC */
-
-int misc_init_r(void)
-{
- cl_print_pcb_info();
-
- return 0;
-}
-
-u32 get_board_rev(void)
-{
- return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- enable_usb_clocks(index);
- return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- disable_usb_clocks(index);
- return 0;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Ethernet specific code for CompuLab CL-SOM-AM57x module
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Uri Mashiach <uri.mashiach@compulab.co.il>
- */
-
-#include <common.h>
-#include <cpsw.h>
-#include <environment.h>
-#include <miiphy.h>
-#include <asm/gpio.h>
-#include <asm/arch/sys_proto.h>
-#include "../common/eeprom.h"
-
-static void cpsw_control(int enabled)
-{
- /* VTP can be added here */
-}
-
-static struct cpsw_slave_data cl_som_am57x_cpsw_slaves[] = {
- {
- .slave_reg_ofs = 0x208,
- .sliver_reg_ofs = 0xd80,
- .phy_addr = 0,
- .phy_if = PHY_INTERFACE_MODE_RMII,
- },
- {
- .slave_reg_ofs = 0x308,
- .sliver_reg_ofs = 0xdc0,
- .phy_addr = 1,
- .phy_if = PHY_INTERFACE_MODE_RMII,
-
- },
-};
-
-static struct cpsw_platform_data cl_som_am57_cpsw_data = {
- .mdio_base = CPSW_MDIO_BASE,
- .cpsw_base = CPSW_BASE,
- .mdio_div = 0xff,
- .channels = 8,
- .cpdma_reg_ofs = 0x800,
- .slaves = 2,
- .slave_data = cl_som_am57x_cpsw_slaves,
- .ale_reg_ofs = 0xd00,
- .ale_entries = 1024,
- .host_port_reg_ofs = 0x108,
- .hw_stats_reg_ofs = 0x900,
- .bd_ram_ofs = 0x2000,
- .mac_control = (1 << 5),
- .control = cpsw_control,
- .host_port_num = 0,
- .version = CPSW_CTRL_VERSION_2,
-};
-
-/*
- * cl_som_am57x_efuse_read_mac_addr() - read Ethernet port MAC address.
- * The information is retrieved from the SOC's registers.
- * @buff: read buffer.
- * @port_num: port number.
- */
-static void cl_som_am57x_efuse_read_mac_addr(uchar *buff, uint port_num)
-{
- uint32_t mac_hi, mac_lo;
-
- if (port_num) {
- mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
- mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
- } else {
- mac_lo = readl((*ctrl)->control_core_mac_id_0_lo);
- mac_hi = readl((*ctrl)->control_core_mac_id_0_hi);
- }
-
- buff[0] = (mac_hi & 0xFF0000) >> 16;
- buff[1] = (mac_hi & 0xFF00) >> 8;
- buff[2] = mac_hi & 0xFF;
- buff[3] = (mac_lo & 0xFF0000) >> 16;
- buff[4] = (mac_lo & 0xFF00) >> 8;
- buff[5] = mac_lo & 0xFF;
-}
-
-/*
- * cl_som_am57x_handle_mac_address() - set MAC address in the U-Boot
- * environment.
- * The address is retrieved retrieved from an EEPROM field or from the
- * SOC's registers.
- * @env_name: U-Boot environment name.
- * @field_name: EEPROM field name.
- * @port_num: SOC's port number.
- */
-static int cl_som_am57x_handle_mac_address(char *env_name, uint port_num)
-{
- int ret;
- uint8_t enetaddr[6];
-
- ret = eth_env_get_enetaddr(env_name, enetaddr);
- if (ret)
- return 0;
-
- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS);
-
- if (ret || !is_valid_ethaddr(enetaddr))
- cl_som_am57x_efuse_read_mac_addr(enetaddr, port_num);
-
- if (!is_valid_ethaddr(enetaddr))
- return -1;
-
- ret = eth_env_set_enetaddr(env_name, enetaddr);
- if (ret)
- printf("cl-som-am57x: Failed to set Eth port %d MAC address\n",
- port_num);
-
- return ret;
-}
-
-#define CL_SOM_AM57X_PHY_ADDR2 0x01
-#define AR8033_PHY_DEBUG_ADDR_REG 0x1d
-#define AR8033_PHY_DEBUG_DATA_REG 0x1e
-#define AR8033_DEBUG_RGMII_RX_CLK_DLY_REG 0x00
-#define AR8033_DEBUG_RGMII_TX_CLK_DLY_REG 0x05
-#define AR8033_DEBUG_RGMII_RX_CLK_DLY_MASK (1 << 15)
-#define AR8033_DEBUG_RGMII_TX_CLK_DLY_MASK (1 << 8)
-
-/*
- * cl_som_am57x_rgmii_clk_delay() - Set RGMII clock delay.
- * Enable RX delay, disable TX delay.
- */
-static void cl_som_am57x_rgmii_clk_delay(void)
-{
- uint16_t mii_reg_val;
- const char *devname;
-
- devname = miiphy_get_current_dev();
- /* PHY 2 */
- miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_ADDR_REG,
- AR8033_DEBUG_RGMII_RX_CLK_DLY_REG);
- miiphy_read(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
- &mii_reg_val);
- mii_reg_val |= AR8033_DEBUG_RGMII_RX_CLK_DLY_MASK;
- miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
- mii_reg_val);
-
- miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_ADDR_REG,
- AR8033_DEBUG_RGMII_TX_CLK_DLY_REG);
- miiphy_read(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
- &mii_reg_val);
- mii_reg_val &= ~AR8033_DEBUG_RGMII_TX_CLK_DLY_MASK;
- miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
- mii_reg_val);
-}
-
-#define CL_SOM_AM57X_GPIO_PHY1_RST 92 /* GPIO3_28 */
-#define CL_SOM_AM57X_RGMII_PORT1 1
-
-int board_eth_init(bd_t *bis)
-{
- int ret;
- uint32_t ctrl_val;
- char *cpsw_phy_envval;
- int cpsw_act_phy = 1;
-
- /* SB-SOM-AM57x primary Eth (P21) is routed to RGMII1 */
- ret = cl_som_am57x_handle_mac_address("ethaddr",
- CL_SOM_AM57X_RGMII_PORT1);
-
- if (ret)
- return -1;
-
- /* Select RGMII for GMII1_SEL */
- ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
- ctrl_val |= 0x22;
- writel(ctrl_val, (*ctrl)->control_core_control_io1);
- mdelay(10);
-
- gpio_request(CL_SOM_AM57X_GPIO_PHY1_RST, "phy1_rst");
- gpio_direction_output(CL_SOM_AM57X_GPIO_PHY1_RST, 0);
- mdelay(20);
-
- gpio_set_value(CL_SOM_AM57X_GPIO_PHY1_RST, 1);
- mdelay(20);
-
- cpsw_phy_envval = env_get("cpsw_phy");
- if (cpsw_phy_envval != NULL)
- cpsw_act_phy = simple_strtoul(cpsw_phy_envval, NULL, 0);
-
- cl_som_am57_cpsw_data.active_slave = cpsw_act_phy;
-
- ret = cpsw_register(&cl_som_am57_cpsw_data);
- if (ret < 0)
- printf("Error %d registering CPSW switch\n", ret);
-
- /* Set RGMII clock delay */
- cl_som_am57x_rgmii_clk_delay();
-
- return ret;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Pinmux configuration for CompuLab CL-SOM-AM57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mux_dra7xx.h>
-
-/* Serial console */
-static const struct pad_conf_entry cl_som_am57x_padconf_console[] = {
- {UART3_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* UART3_RXD */
- {UART3_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* UART3_TXD */
-};
-
-/* PMIC I2C */
-static const struct pad_conf_entry cl_som_am57x_padconf_pmic[] = {
- {MCASP1_ACLKR, (M10 | PIN_INPUT)}, /* MCASP1_ACLKR.I2C4_SDA */
- {MCASP1_FSR, (M10 | PIN_INPUT)}, /* MCASP1_FSR.I2C4_SCL */
-};
-
-/* Green GPIO led */
-static const struct pad_conf_entry cl_som_am57x_padconf_green_led[] = {
- {GPMC_A15, (M14 | PIN_OUTPUT_PULLDOWN)}, /* GPMC_A15.GPIO2_5 */
-};
-
-/* MMC/SD Card */
-static const struct pad_conf_entry cl_som_am57x_padconf_sd_card[] = {
- {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_CLK */
- {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_CMD */
- {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT0 */
- {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT1 */
- {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT2 */
- {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT3 */
- {MMC1_SDCD, (M14 | PIN_INPUT) }, /* MMC1_SDCD */
- {MMC1_SDWP, (M14 | PIN_INPUT) }, /* MMC1_SDWP */
-};
-
-/* WiFi - must be in the safe mode on boot */
-static const struct pad_conf_entry cl_som_am57x_padconf_wifi[] = {
- {UART1_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_CTSN */
- {UART1_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_RTSN */
- {UART2_RXD, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RXD */
- {UART2_TXD, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_TXD */
- {UART2_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_CTSN */
- {UART2_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RTSN */
-};
-
-/* QSPI */
-static const struct pad_conf_entry cl_som_am57x_padconf_qspi[] = {
- {GPMC_A13, (M1 | PIN_INPUT) }, /* GPMC_A13.QSPI1_RTCLK */
- {GPMC_A18, (M1 | PIN_INPUT) }, /* GPMC_A18.QSPI1_SCLK */
- {GPMC_A16, (M1 | PIN_INPUT) }, /* GPMC_A16.QSPI1_D0 */
- {GPMC_A17, (M1 | PIN_INPUT) }, /* GPMC_A17.QSPI1_D1 */
- {GPMC_CS2, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_CS2.QSPI1_CS0 */
-};
-
-/* GPIO Expander I2C */
-static const struct pad_conf_entry cl_som_am57x_padconf_i2c_gpio[] = {
- {MCASP1_AXR0, (M10 | PIN_INPUT)}, /* MCASP1_AXR0.I2C5_SDA */
- {MCASP1_AXR1, (M10 | PIN_INPUT)}, /* MCASP1_AXR1.I2C5_SCL */
-};
-
-/* eMMC internal storage */
-static const struct pad_conf_entry cl_som_am57x_padconf_emmc[] = {
- {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A19.MMC2_DAT4 */
- {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A20.MMC2_DAT5 */
- {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A21.MMC2_DAT6 */
- {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A22.MMC2_DAT7 */
- {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A23.MMC2_CLK */
- {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A24.MMC2_DAT0 */
- {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A25.MMC2_DAT1 */
- {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A26.MMC2_DAT2 */
- {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A27.MMC2_DAT3 */
- {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_CS1.MMC2_CMD */
-};
-
-/* usb1_drvvbus */
-static const struct pad_conf_entry cl_som_am57x_padconf_usb[] = {
- /* USB1_DRVVBUS.USB1_DRVVBUS */
- {USB1_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL) },
-};
-
-/* Ethernet */
-static const struct pad_conf_entry cl_som_am57x_padconf_ethernet[] = {
- /* MDIO bus */
- {VIN2A_D10, (M3 | PIN_OUTPUT_PULLUP) }, /* VIN2A_D10.MDIO_MCLK */
- {VIN2A_D11, (M3 | PIN_INPUT_PULLUP) }, /* VIN2A_D11.MDIO_D */
- /* EMAC Slave 1 at addr 0x1 - Default interface */
- {VIN2A_D12, (M3 | PIN_OUTPUT) }, /* VIN2A_D12.RGMII1_TXC */
- {VIN2A_D13, (M3 | PIN_OUTPUT) }, /* VIN2A_D13.RGMII1_TXCTL */
- {VIN2A_D14, (M3 | PIN_OUTPUT) }, /* VIN2A_D14.RGMII1_TXD3 */
- {VIN2A_D15, (M3 | PIN_OUTPUT) }, /* VIN2A_D15.RGMII1_TXD2 */
- {VIN2A_D16, (M3 | PIN_OUTPUT) }, /* VIN2A_D16.RGMII1_TXD1 */
- {VIN2A_D17, (M3 | PIN_OUTPUT) }, /* VIN2A_D17.RGMII1_TXD0 */
- {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D18.RGMII1_RXC */
- {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D19.RGMII1_RXCTL */
- {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D20.RGMII1_RXD3 */
- {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D21.RGMII1_RXD2 */
- {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D22.RGMII1_RXD1 */
- {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D23.RGMII1_RXD0 */
- /* Eth PHY1 reset GPIOs*/
- {VIN2A_CLK0, (M14 | PIN_OUTPUT_PULLDOWN)}, /* VIN2A_CLK0.GPIO3_28 */
-};
-
-#define SET_MUX(mux_array) do_set_mux32((*ctrl)->control_padconf_core_base, \
- mux_array, ARRAY_SIZE(mux_array))
-
-void set_muxconf_regs(void)
-{
- SET_MUX(cl_som_am57x_padconf_console);
- SET_MUX(cl_som_am57x_padconf_pmic);
- SET_MUX(cl_som_am57x_padconf_green_led);
- SET_MUX(cl_som_am57x_padconf_sd_card);
- SET_MUX(cl_som_am57x_padconf_wifi);
- SET_MUX(cl_som_am57x_padconf_qspi);
- SET_MUX(cl_som_am57x_padconf_i2c_gpio);
- SET_MUX(cl_som_am57x_padconf_emmc);
- SET_MUX(cl_som_am57x_padconf_usb);
- SET_MUX(cl_som_am57x_padconf_ethernet);
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SPL data and initialization for CompuLab CL-SOM-AM57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Uri Mashiach <uri.mashiach@compulab.co.il>
- */
-
-#include <asm/emif.h>
-#include <asm/omap_common.h>
-#include <asm/arch/sys_proto.h>
-
-static const struct dmm_lisa_map_regs cl_som_am57x_lisa_regs = {
- .dmm_lisa_map_3 = 0x80740300,
- .is_ma_present = 0x1
-};
-
-void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
-{
- /* Disable SDRAM controller EMIF2 for single core SOC */
- *dmm_lisa_regs = &cl_som_am57x_lisa_regs;
- if (omap_revision() == DRA722_ES1_0) {
- ((struct dmm_lisa_map_regs *) *dmm_lisa_regs)->dmm_lisa_map_3 =
- 0x80640100;
- }
-}
-
-static const struct emif_regs cl_som_am57x_emif1_ddr3_532mhz_emif_regs = {
- .sdram_config_init = 0x61852332,
- .sdram_config = 0x61852332,
- .sdram_config2 = 0x00000000,
- .ref_ctrl = 0x000040f1,
- .ref_ctrl_final = 0x00001040,
- .sdram_tim1 = 0xeeef36f3,
- .sdram_tim2 = 0x348f7fda,
- .sdram_tim3 = 0x027f88a8,
- .read_idle_ctrl = 0x00050000,
- .zq_config = 0x1007190b,
- .temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0034400b,
- .emif_ddr_phy_ctlr_1 = 0x0e34400b,
- .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00740074,
- .emif_ddr_ext_phy_ctrl_3 = 0x00780078,
- .emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
- .emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
- .emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
-};
-
-/* Ext phy ctrl regs 1-35 */
-static const u32 cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs[] = {
- 0x10040100,
- 0x00740074,
- 0x00780078,
- 0x007c007c,
- 0x007b007b,
- 0x00800080,
- 0x00360036,
- 0x00340034,
- 0x00360036,
- 0x00350035,
- 0x00350035,
-
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
-
- 0x00430043,
- 0x003e003e,
- 0x004a004a,
- 0x00470047,
- 0x00400040,
-
- 0x00000000,
- 0x00600020,
- 0x40011080,
- 0x08102040,
-
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x0,
- 0x0,
- 0x0,
- 0x0,
- 0x0
-};
-
-static const struct emif_regs cl_som_am57x_emif2_ddr3_532mhz_emif_regs = {
- .sdram_config_init = 0x61852332,
- .sdram_config = 0x61852332,
- .sdram_config2 = 0x00000000,
- .ref_ctrl = 0x000040f1,
- .ref_ctrl_final = 0x00001040,
- .sdram_tim1 = 0xeeef36f3,
- .sdram_tim2 = 0x348f7fda,
- .sdram_tim3 = 0x027f88a8,
- .read_idle_ctrl = 0x00050000,
- .zq_config = 0x1007190b,
- .temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0034400b,
- .emif_ddr_phy_ctlr_1 = 0x0e34400b,
- .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00740074,
- .emif_ddr_ext_phy_ctrl_3 = 0x00780078,
- .emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
- .emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
- .emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
-};
-
-static const u32 cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs[] = {
- 0x10040100,
- 0x00820082,
- 0x008b008b,
- 0x00800080,
- 0x007e007e,
- 0x00800080,
- 0x00370037,
- 0x00390039,
- 0x00360036,
- 0x00370037,
- 0x00350035,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x00540054,
- 0x00540054,
- 0x004e004e,
- 0x004c004c,
- 0x00400040,
-
- 0x00000000,
- 0x00600020,
- 0x40011080,
- 0x08102040,
-
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x0,
- 0x0,
- 0x0,
- 0x0,
- 0x0
-};
-
-static struct vcores_data cl_som_am57x_volts = {
- .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM,
- .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
- .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .mpu.addr = TPS659038_REG_ADDR_SMPS12,
- .mpu.pmic = &tps659038,
-
- .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM,
- .eve.value[OPP_OD] = VDD_EVE_DRA7_OD,
- .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH,
- .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
- .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
- .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
- .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .eve.addr = TPS659038_REG_ADDR_SMPS45,
- .eve.pmic = &tps659038,
-
- .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM,
- .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD,
- .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH,
- .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
- .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
- .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
- .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .gpu.addr = TPS659038_REG_ADDR_SMPS6,
- .gpu.pmic = &tps659038,
-
- .core.value[OPP_NOM] = VDD_CORE_DRA7_NOM,
- .core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM,
- .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .core.addr = TPS659038_REG_ADDR_SMPS7,
- .core.pmic = &tps659038,
-
- .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM,
- .iva.value[OPP_OD] = VDD_IVA_DRA7_OD,
- .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH,
- .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM,
- .iva.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_IVA_OD,
- .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH,
- .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .iva.addr = TPS659038_REG_ADDR_SMPS8,
- .iva.pmic = &tps659038,
-};
-
-void hw_data_init(void)
-{
- *prcm = &dra7xx_prcm;
- *dplls_data = &dra7xx_dplls;
- *omap_vcores = &cl_som_am57x_volts;
- *ctrl = &dra7xx_ctrl;
-}
-
-void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
-{
- switch (emif_nr) {
- case 1:
- *regs = &cl_som_am57x_emif1_ddr3_532mhz_emif_regs;
- break;
- case 2:
- *regs = &cl_som_am57x_emif2_ddr3_532mhz_emif_regs;
- break;
- }
-}
-
-void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
-{
- switch (emif_nr) {
- case 1:
- *regs = cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs;
- *size = ARRAY_SIZE(cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs);
- break;
- case 2:
- *regs = cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs;
- *size = ARRAY_SIZE(cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs);
- break;
- }
-}
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_OMAP54XX=y
-CONFIG_TARGET_CL_SOM_AM57X=y
-CONFIG_SPL=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_NR_DRAM_BANKS=2
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_PROMPT="U-Boot# "
-CONFIG_CMD_ASKENV=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_EEPROM_LAYOUT=y
-CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_SCSI_AHCI=y
-CONFIG_CMD_PCA953X=y
-CONFIG_LED_STATUS=y
-CONFIG_LED_STATUS_GPIO=y
-CONFIG_LED_STATUS0=y
-CONFIG_LED_STATUS_BIT=37
-CONFIG_LED_STATUS_STATE=2
-CONFIG_MMC_OMAP_HS=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_SPEED=48000000
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_MII=y
-CONFIG_DRIVER_TI_CPSW=y
-CONFIG_CONS_INDEX=3
-CONFIG_SYS_NS16550=y
-CONFIG_SPI=y
-CONFIG_TI_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_OMAP_USB_PHY=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_USB_ETHER_MCS7830=y
-CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_FAT_WRITE=y
-CONFIG_OF_LIBFDT=y
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration settings for CompuLab CL-SOM-AM57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-
-#ifndef __CONFIG_CL_SOM_AM57X_H
-#define __CONFIG_CL_SOM_AM57X_H
-
-#define CONSOLEDEV "ttyO2"
-#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
-
-#define CONFIG_SYS_OMAP_ABE_SYSCK
-
-#define PARTS_DEFAULT
-
-#include <configs/ti_omap5_common.h>
-
-/* misc */
-#define CONFIG_REVISION_TAG
-
-/* PMIC I2C bus number */
-#define CONFIG_SYS_SPD_BUS_NUM 3
-
-/* SPI Flash support */
-#define CONFIG_TI_SPI_MMAP
-
-/* SPI SPL defines */
-/* Offsets: 0K - SPL1, 64K - SPL2, 128K - SPL3, 192K - SPL4, 256K - U-Boot */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024)
-#define CONFIG_SPL_SPI_SUPPORT
-
-/* SD/MMC RAW/FS boot */
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-
-/* Environment */
-#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB env size */
-
-#define CONFIG_ENV_SECT_SIZE (64 * 1024)
-#define CONFIG_ENV_OFFSET (768 * 1024)
-
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_I2C_EEPROM_BUS 3
-
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_EEPROM_SIZE 256
-
-#ifndef CONFIG_SPL_BUILD
-/* SATA */
-#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
-#define CONFIG_SYS_SCSI_MAX_LUN 1
-#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
- CONFIG_SYS_SCSI_MAX_LUN)
-/* PCA9555 GPIO expander support */
-#define CONFIG_PCA953X
-#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
-#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
-
-#endif /* !CONFIG_SPL_BUILD */
-
-/* USB xHCI HOST */
-#define CONFIG_USB_XHCI_OMAP
-
-#define CONFIG_OMAP_USB3PHY1_HOST
-
-/* USB Networking options */
-
-/* CPSW Ethernet */
-#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_PHY_ATHEROS
-#define CONFIG_SYS_RX_ETH_BUFFER 64
-#define PHY_ANEG_TIMEOUT 8000
-
-#define CONFIG_BOOTP_DNS2
-#define CONFIG_NET_RETRY_COUNT 10
-
-/* Default environment */
-#undef CONFIG_EXTRA_ENV_SETTINGS
-#define CONFIG_EXTRA_ENV_SETTINGS \
- DEFAULT_LINUX_BOOT_ENV \
- "autoload=no\0" \
- "baudrate=115200\0" \
- "console=ttyO2,115200n8\0" \
- "bootdelay=3\0" \
- "fdtfile=am57xx-sbc-am57x.dtb\0" \
- "kernel=zImage-cl-som-am57x\0" \
- "bootscr=bootscr.img\0" \
- "displaytype=hdmi\0" \
- "bootkernel=bootz ${loadaddr} - ${fdtaddr}\0" \
- "mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
- "mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
- "emmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
- "emmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
- "load_mmc=mmc dev ${mmcdev} && mmc rescan && " \
- "run mmcloadkernel && run mmcloadfdt\0" \
- "mmcroot=/dev/mmcblk1p2\0" \
- "mmcrootfstype=ext4 rw rootwait\0" \
- "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
- "rootfstype=${mmcrootfstype}\0" \
- "mmcbootscript=setenv mmcdev 0; mmc dev ${mmcdev} && mmc rescan && " \
- "load mmc ${mmcdev} ${loadaddr} ${bootscr} && " \
- "echo Running bootscript from MMC/SD Card ... && " \
- "source ${loadaddr}\0" \
- "mmcboot=setenv mmcdev 0 && run load_mmc && " \
- "run mmcargs && echo Booting from MMC/SD Card ... && " \
- "run bootkernel\0" \
- "emmcroot=/dev/mmcblk0p2\0" \
- "emmcrootfstype=ext4 rw rootwait\0" \
- "emmcargs=setenv bootargs console=${console} " \
- "root=${emmcroot} " \
- "rootfstype=${emmcrootfstype}\0" \
- "emmcbootscript=setenv mmcdev 1; mmc dev ${mmcdev} && mmc rescan && " \
- "load mmc ${mmcdev} ${loadaddr} ${bootscr} && " \
- "echo Running bootscript from eMMC ... && " \
- "source ${loadaddr}\0" \
- "emmcboot=setenv mmcdev 1 && run load_mmc && " \
- "run emmcargs && echo Booting from eMMC ... && " \
- "run bootkernel\0" \
- "sataroot=/dev/sda2\0" \
- "satarootfstype=ext4 rw rootwait\0" \
- "load_sata=load scsi 0 ${loadaddr} ${kernel} && " \
- "load scsi 0 ${fdtaddr} ${fdtfile}\0" \
- "sataargs=setenv bootargs console=${console} " \
- "root=${sataroot} " \
- "rootfstype=${satarootfstype}\0" \
- "satabootscript=load scsi 0 ${loadaddr} ${bootscr} && " \
- "echo Running bootscript from SATA ... && " \
- "source ${loadaddr}\0" \
- "sataboot=run load_sata && run sataargs && " \
- "echo Booting from SATA ... && " \
- "run bootkernel\0"
-
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND \
- "run mmcbootscript || run mmcboot || " \
- "run satabootscript || run sataboot || " \
- "run emmcbootscript || run emmcboot"
-
-
-#endif /* __CONFIG_CL_SOM_AM57X_H */
projects / u-boot.git / commitdiff