riscv: dts: hifive-unleashed-a00: add cpu aliases

Add cpu aliases to U-Boot specific dtsi for hifive-unleashed.
Without aliases we see that the CPU device sequence numbers are set
randomly and the cpu list/detail command will show it as follows:
=> cpu list
  1: cpu@1      rv64imafdc
  2: cpu@2      rv64imafdc
  3: cpu@3      rv64imafdc
  0: cpu@4      rv64imafdc

Seems like CPU probing with dm-model also relies on aliases as observed
in case spi. The fu540-c000-u-boot.dtsi has cpu nodes and so adding
corresponding aliases we can ensure that cpu devices are assigned
proper sequence as follows:

=> cpu list
  1: cpu@1      rv64imafdc
  2: cpu@2      rv64imafdc
  3: cpu@3      rv64imafdc
  4: cpu@4      rv64imafdc

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>

diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
index 303806454b048609cc0c8fc31156d52a41b94ed8..e0371505206c4c76b0980b4f1dd96f090fa71cdb 100644 (file)
--- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
+++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
@@ -8,6 +8,10 @@
 
 / {
        aliases {
+               cpu1 = &cpu1;
+               cpu2 = &cpu2;
+               cpu3 = &cpu3;
+               cpu4 = &cpu4;
                spi0 = &qspi0;
                spi2 = &qspi2;
        };