imx: imx8m: add 1GHz fracpll entry

4000MTS DDR needs 1GHz fracpll, so add the entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index ee44ba75febe9de986412910da09f6f4d29fb22e..68575a2bd37a3d3a171439f44af6886f3fbe4a94 100644 (file)
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -50,6 +50,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 
 #ifdef CONFIG_SPL_BUILD
 static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = {
+       PLL_1443X_RATE(1000000000U, 250, 3, 1, 0),
        PLL_1443X_RATE(800000000U, 300, 9, 0, 0),
        PLL_1443X_RATE(750000000U, 250, 8, 0, 0),
        PLL_1443X_RATE(650000000U, 325, 3, 2, 0),