pci: pci_mvebu, pci_aardvark: Fix size of configuration cache

Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>

diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
index 4e94b776c5b9d46a40defac3eb2f42ba7268cbc2..8abbc3ffe84f690cac015cb2619e93b7b441598b 100644 (file)
--- a/drivers/pci/pci-aardvark.c
+++ b/drivers/pci/pci-aardvark.c
@@ -202,7 +202,7 @@ struct pcie_advk {
        int                     sec_busno;
        struct udevice          *dev;
        struct gpio_desc        reset_gpio;
-       u32                     cfgcache[0x34 - 0x10];
+       u32                     cfgcache[(0x34 - 0x10) / 4];
        bool                    cfgcrssve;
 };
 

diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 14cd82db6ff8cafa3c8f7bd21a09b151f679c47e..2d1624deb2665d51630b9c708d3dcb1374159323 100644 (file)
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -88,7 +88,7 @@ struct mvebu_pcie {
        unsigned int mem_attr;
        unsigned int io_target;
        unsigned int io_attr;
-       u32 cfgcache[0x34 - 0x10];
+       u32 cfgcache[(0x34 - 0x10) / 4];
 };
 
 /*