rockchip: veyron: Enable Winbond SPI flash

Some veyron boards seem to have Winbond SPI flash chips instead of
GigaDevice ones. At the very least, coreboot builds for veyron boards
have them enabled [1]. Enable support for them here as well.

[1] https://review.coreboot.org/c/coreboot/+/9719

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index d4302353c5df289c583c09ed78f9e7691f11d063..253ef99f99394f99b2534f9008bdc823528a196d 100644 (file)
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -81,6 +81,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
 CONFIG_SF_DEFAULT_BUS=2
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y

diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 1a54986d089e29120809b00fafd53e7efe14489f..3172f04a2648a1934b50bc1be8b2f6d3678c5bbb 100644 (file)
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -84,6 +84,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
 CONFIG_SF_DEFAULT_BUS=2
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y

diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 73ab2f62af5e7e30047209f63fd96103eda5de95..25a56f45fe6c3b1ea6b0a085280ed46757d2f56f 100644 (file)
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -83,6 +83,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
 CONFIG_SF_DEFAULT_BUS=2
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y

diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index 06437aae18d67dbef640708c4ad5f8cc04528efd..ff2a12b25c34d91f52ed52b2d853eeb11d658276 100644 (file)
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -82,6 +82,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
 CONFIG_SF_DEFAULT_BUS=2
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y