arm: bcmbca: add bcm4908 SoC support

BCM4908 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added
under ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.

This SoC is supported in the linux git repository so the dts and dtsi
files are stripped down version of linux copies with mininum blocks
needed by u-boot.

The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 8ce2339fb9846bcb75d72ce5eae57c8361c03c91..39d4ab7d104d458092231cc67bdcb90452d62bff 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -218,6 +218,7 @@ F:  arch/arm/mach-bcmbca/
 F:     board/broadcom/bcmbca/
 N:     bcmbca
 N:     bcm[9]?47622
+N:     bcm[9]?4908
 N:     bcm[9]?4912
 N:     bcm[9]?63138
 N:     bcm[9]?63146

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e2d2fffb02ce56af249f27d37b78a1511a729582..37ea50f12a4e9809d34b2ca5fa013ddf050632e9 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1182,6 +1182,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
 
 dtb-$(CONFIG_BCM47622) += \
        bcm947622.dtb
+dtb-$(CONFIG_BCM4908) += \
+       bcm94908.dtb
 dtb-$(CONFIG_BCM4912) += \
        bcm94912.dtb
 dtb-$(CONFIG_BCM63138) += \

diff --git a/arch/arm/dts/bcm4908.dtsi b/arch/arm/dts/bcm4908.dtsi
new file mode 100644 (file)
index 0000000..0be5cfe
--- /dev/null
+++ b/arch/arm/dts/bcm4908.dtsi
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/dts-v1/;
+
+/ {
+       compatible = "brcm,bcm4908", "brcm,bcmbca";
+
+       interrupt-parent = <&gic>;
+
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "brcm,brahma-b53";
+                       reg = <0x0>;
+                       enable-method = "spin-table";
+                       cpu-release-addr = <0x0 0xfff8>;
+                       next-level-cache = <&l2>;
+               };
+
+               cpu1: cpu@1 {
+                       device_type = "cpu";
+                       compatible = "brcm,brahma-b53";
+                       reg = <0x1>;
+                       enable-method = "spin-table";
+                       cpu-release-addr = <0x0 0xfff8>;
+                       next-level-cache = <&l2>;
+               };
+
+               cpu2: cpu@2 {
+                       device_type = "cpu";
+                       compatible = "brcm,brahma-b53";
+                       reg = <0x2>;
+                       enable-method = "spin-table";
+                       cpu-release-addr = <0x0 0xfff8>;
+                       next-level-cache = <&l2>;
+               };
+
+               cpu3: cpu@3 {
+                       device_type = "cpu";
+                       compatible = "brcm,brahma-b53";
+                       reg = <0x3>;
+                       enable-method = "spin-table";
+                       cpu-release-addr = <0x0 0xfff8>;
+                       next-level-cache = <&l2>;
+               };
+
+               l2: l2-cache0 {
+                       compatible = "cache";
+               };
+       };
+
+       axi@81000000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x00 0x00 0x81000000 0x4000>;
+
+               gic: interrupt-controller@1000 {
+                       compatible = "arm,gic-400";
+                       #interrupt-cells = <3>;
+                       #address-cells = <0>;
+                       interrupt-controller;
+                       reg = <0x1000 0x1000>,
+                             <0x2000 0x2000>;
+               };
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+       };
+
+       pmu {
+               compatible = "arm,cortex-a53-pmu";
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+       };
+
+       clocks {
+               periph_clk: periph_clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <50000000>;
+                       clock-output-names = "periph";
+               };
+       };
+
+       bus@ff800000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x00 0x00 0xff800000 0x3000>;
+
+               uart0: serial@640 {
+                       compatible = "brcm,bcm6345-uart";
+                       reg = <0x640 0x18>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&periph_clk>;
+                       clock-names = "refclk";
+                       status = "disabled";
+               };
+
+       };
+};

diff --git a/arch/arm/dts/bcm94908.dts b/arch/arm/dts/bcm94908.dts
new file mode 100644 (file)
index 0000000..fcbd3c4
--- /dev/null
+++ b/arch/arm/dts/bcm94908.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4908.dtsi"
+
+/ {
+       model = "Broadcom BCM94908 Reference Board";
+       compatible = "brcm,bcm94908", "brcm,bcm4908", "brcm,bcmbca";
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x08000000>;
+       };
+};
+
+&uart0 {
+       status = "okay";
+};

diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index a7a3b4b57ceb14c88ee6254a4f84a497db23388e..eb03ef42b8d26f7b4a2f334e6f9283edade88400 100644 (file)
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -12,6 +12,13 @@ config BCM47622
        select DM_SERIAL
        select PL01X_SERIAL
 
+config BCM4908
+       bool "Support for Broadcom 4908 Family"
+       select ARM64
+       select SYS_ARCH_TIMER
+       select DM_SERIAL
+       select BCM6345_SERIAL
+
 config BCM4912
        bool "Support for Broadcom 4912 Family"
        select ARM64
@@ -77,6 +84,7 @@ config BCM6878
        select PL01X_SERIAL
 
 source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
+source "arch/arm/mach-bcmbca/bcm4908/Kconfig"
 source "arch/arm/mach-bcmbca/bcm4912/Kconfig"
 source "arch/arm/mach-bcmbca/bcm63138/Kconfig"
 source "arch/arm/mach-bcmbca/bcm63146/Kconfig"

diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index a7bf5a616a2a415658c06c5d7fb241731661bbfb..c8c344ba7271c87cfb61ea8d17b7be4d15a3c6fc 100644 (file)
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -4,6 +4,7 @@
 #
 
 obj-$(CONFIG_BCM47622) += bcm47622/
+obj-$(CONFIG_BCM4908) += bcm4908/
 obj-$(CONFIG_BCM4912) += bcm4912/
 obj-$(CONFIG_BCM63138) += bcm63138/
 obj-$(CONFIG_BCM63146) += bcm63146/

diff --git a/arch/arm/mach-bcmbca/bcm4908/Kconfig b/arch/arm/mach-bcmbca/bcm4908/Kconfig
new file mode 100644 (file)
index 0000000..564bc8d
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4908/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM4908
+
+config TARGET_BCM94908
+       bool "Broadcom 4908 Reference Board"
+       depends on ARCH_BCMBCA
+
+config SYS_SOC
+       default "bcm4908"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif

diff --git a/arch/arm/mach-bcmbca/bcm4908/Makefile b/arch/arm/mach-bcmbca/bcm4908/Makefile
new file mode 100644 (file)
index 0000000..6262497
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4908/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o

diff --git a/arch/arm/mach-bcmbca/bcm4908/mmu_table.c b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c
new file mode 100644 (file)
index 0000000..5ab0408
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm94908_mem_map[] = {
+               {
+                               .virt = 0x00000000UL,
+                               .phys = 0x00000000UL,
+                               .size = 1UL * SZ_1G,
+                               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                                               PTE_BLOCK_INNER_SHARE
+               },
+               {
+                               /* SoC peripheral */
+                               .virt = 0xff800000UL,
+                               .phys = 0xff800000UL,
+                               .size = 0x100000,
+                               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                                               PTE_BLOCK_NON_SHARE |
+                                               PTE_BLOCK_PXN | PTE_BLOCK_UXN
+               },
+               {
+                               /* List terminator */
+                               0,
+               }
+};
+
+struct mm_region *mem_map = bcm94908_mem_map;

diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 109e7a46c6276f300f711befac8101c249cd59a9..c9155fb48e0a8d9b1de966c61e152be8e5f03d7f 100644 (file)
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -16,6 +16,13 @@ config SYS_CONFIG_NAME
 
 endif
 
+if TARGET_BCM94908
+
+config SYS_CONFIG_NAME
+       default "bcm94908"
+
+endif
+
 if TARGET_BCM94912
 
 config SYS_CONFIG_NAME

diff --git a/configs/bcm94908_defconfig b/configs/bcm94908_defconfig
new file mode 100644 (file)
index 0000000..6dfb882
--- /dev/null
+++ b/configs/bcm94908_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM4908=y
+CONFIG_TARGET_BCM94908=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="bcm94908"
+CONFIG_IDENT_STRING=" Broadcom BCM4908"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y

diff --git a/include/configs/bcm94908.h b/include/configs/bcm94908.h
new file mode 100644 (file)
index 0000000..1346ace
--- /dev/null
+++ b/include/configs/bcm94908.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM94908_H
+#define __BCM94908_H
+
+#define CONFIG_SYS_SDRAM_BASE          0x00000000
+
+#endif