clk: sunxi: Extend DM_RESET selection to SPL

The sunxi clock driver exposes a reset controller, so it selects the
reset controller framework. Ensure that dependency is also satisfied
when building the driver for the SPL.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig
index f89c7ffd42ae31e4eddd116fe7c5f8f125ab755b..f19908113e110349c3d117989de4523147eca907 100644 (file)
--- a/drivers/clk/sunxi/Kconfig
+++ b/drivers/clk/sunxi/Kconfig
@@ -2,6 +2,7 @@ config CLK_SUNXI
        bool "Clock support for Allwinner SoCs"
        depends on CLK && ARCH_SUNXI
        select DM_RESET
+       select SPL_DM_RESET if SPL_CLK
        default y
        help
          This enables support for common clock driver API on Allwinner