ARM: dts: sam9x60: use slow clock CCF compatible bindings

Use slow clock CCF compatible DT bindings. This will not break
the above functionality as the SoC is not booting with current
PMC bindings.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 51de586e1900603dcef58404c55f14848298399d..6eac2a8e3097ce1600754dd2e3855cee939b7105 100644 (file)
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -27,6 +27,12 @@
        };
 
        clocks {
+               slow_rc_osc: slow_rc_osc {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <18500>;
+               };
+
                slow_xtal: slow_xtal {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
@@ -196,7 +202,7 @@
                                mck: masterck {
                                        compatible = "atmel,at91sam9x5-clk-master";
                                        #clock-cells = <0>;
-                                       clocks = <&md_slck>, <&main>, <&plla>;
+                                       clocks = <&clk32 0>, <&main>, <&plla>;
                                        atmel,clk-output-range = <140000000 200000000>;
                                        atmel,clk-divisors = <1 2 4 6>;
                                };
@@ -264,7 +270,7 @@
                                        compatible = "microchip,sam9x60-clk-generated";
                                        #address-cells = <1>;
                                        #size-cells = <0>;
-                                       clocks = <&md_slck>, <&td_slck>, <&main>, <&mck>, <&plla>;
+                                       clocks = <&clk32 0>, <&clk32 1>, <&main>, <&mck>, <&plla>;
 
                                        sdhci0_gclk: sdhci0_gclk {
                                                #clock-cells = <0>;
@@ -279,33 +285,11 @@
                                clocks = <&mck>;
                        };
 
-                       slowckc: sckc@fffffe50 {
-                               compatible = "atmel,at91sam9x5-sckc";
+                       clk32: sckc@fffffe50 {
+                               compatible = "microchip,sam9x60-sckc";
                                reg = <0xfffffe50 0x4>;
-
-                               slow_osc: slow_osc {
-                                       compatible = "atmel,at91sam9x5-clk-slow-osc";
-                                       #clock-cells = <0>;
-                                       clocks = <&slow_xtal>;
-                               };
-
-                               slow_rc_osc: slow_rc_osc {
-                                       compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
-                                       #clock-cells = <0>;
-                                       clock-frequency = <32768>;
-                               };
-
-                               td_slck: td_slck {
-                                       compatible = "atmel,at91sam9x5-clk-slow";
-                                       #clock-cells = <0>;
-                                       clocks = <&slow_rc_osc>, <&slow_osc>;
-                               };
-
-                               md_slck: md_slck {
-                                       compatible = "atmel,at91sam9x5-clk-slow";
-                                       #clock-cells = <0>;
-                                       clocks = <&slow_rc_osc>;
-                               };
+                               clocks = <&slow_rc_osc>, <&slow_xtal>;
+                               #clock-cells = <1>;
                        };
                };
        };

diff --git a/arch/arm/dts/sam9x60ek-u-boot.dtsi b/arch/arm/dts/sam9x60ek-u-boot.dtsi
index 65b4a3c7c67313b4e6c5926dfeb8ef0bed1ebbc1..c360b8214f1fc6af4b71c2b14704b6ea294898de 100644 (file)
--- a/arch/arm/dts/sam9x60ek-u-boot.dtsi
+++ b/arch/arm/dts/sam9x60ek-u-boot.dtsi
@@ -23,6 +23,10 @@
        };
 };
 
+&clk32 {
+       u-boot,dm-pre-reloc;
+};
+
 &sdhci0 {
        u-boot,dm-pre-reloc;
 };
@@ -31,6 +35,10 @@
        u-boot,dm-pre-reloc;
 };
 
+&slow_rc_osc {
+       u-boot,dm-pre-reloc;
+};
+
 &dbgu {
        u-boot,dm-pre-reloc;
 };
@@ -119,22 +127,3 @@
        u-boot,dm-pre-reloc;
 };
 
-&slowckc {
-       u-boot,dm-pre-reloc;
-};
-
-&slow_osc {
-       u-boot,dm-pre-reloc;
-};
-
-&slow_rc_osc {
-       u-boot,dm-pre-reloc;
-};
-
-&td_slck {
-       u-boot,dm-pre-reloc;
-};
-
-&md_slck {
-       u-boot,dm-pre-reloc;
-};