Convert CONFIG_USB_EHCI_TXFIFO_THRESH to Kconfig

This converts the following to Kconfig:
   CONFIG_USB_EHCI_TXFIFO_THRESH

Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/README b/README
index f3304229d8d22e72664fd9f3318379a37631cf5d..e01ff989bd4b1981efb9515f268d95c6d08e425a 100644 (file)
--- a/README
+++ b/README
@@ -793,9 +793,6 @@ The following options need to be configured:
                Supported are USB Keyboards and USB Floppy drives
                (TEAC FD-05PUB).
 
-               CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
-               txfilltuning field in the EHCI controller on reset.
-
                CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
                HW module registers.
 

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 5d0855ffcc7925694366c154b67eb33da02abebf..8240ed8a4432006c88cc71230c4b4cc73c9286a1 100644 (file)
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -268,6 +268,17 @@ config USB_EHCI_FSL
        select EHCI_HCD_INIT_AFTER_RESET
        ---help---
          Enables support for the on-chip EHCI controller on FSL chips.
+
+config USB_EHCI_TXFIFO_THRESH
+       hex
+       depends on USB_EHCI_TEGRA
+       default 0x10
+       help
+         This parameter affects a TXFILLTUNING field that controls how much
+         data is sent to the latency fifo before it is sent to the wire.
+         Without this parameter, the default (2) causes occasional Data Buffer
+         Errors in OUT packets depending on the buffer address and size.
+
 endif # USB_EHCI_HCD
 
 config USB_OHCI_HCD

diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index 742083158948ecf1331767901d13b64713ffee64..87ec1f5a99d63e53ee900ab3a1f3c2657708e6b0 100644 (file)
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -55,7 +55,4 @@
 
 /* Defines for SPL */
 
-/* For USB EHCI controller */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH  0x10
-
 #endif /* _TEGRA114_COMMON_H_ */

diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
index 314486a1bcbd16a486f702093aa3b53407f3d7b3..f509784a868195d31f343038f1bccc94a5fcfa00 100644 (file)
--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
@@ -57,9 +57,6 @@
 
 /* Defines for SPL */
 
-/* For USB EHCI controller */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH  0x10
-
 /* GPU needs setup */
 #define CONFIG_TEGRA_GPU
 

diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index a2b14d8ead86d35b011766ec5f8a7c277706601a..71867bb6baac5c124fae1110311fb95d74f2121d 100644 (file)
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -69,12 +69,4 @@
 #define TEGRA_LP0_VEC
 #endif
 
-/*
- * This parameter affects a TXFILLTUNING field that controls how much data is
- * sent to the latency fifo before it is sent to the wire. Without this
- * parameter, the default (2) causes occasional Data Buffer Errors in OUT
- * packets depending on the buffer address and size.
- */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH  0x10
-
 #endif /* _TEGRA20_COMMON_H_ */

diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
index 3ba12bec0eedc8cb701ee958a1a9ec8a9c37aa06..e510820786e4278ce3f29dd688da9355f57c8bfb 100644 (file)
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -46,9 +46,6 @@
        "fdt_addr_r=0x83000000\0" \
        "ramdisk_addr_r=0x83420000\0"
 
-/* For USB EHCI controller */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH  0x10
-
 /* GPU needs setup */
 #define CONFIG_TEGRA_GPU
 

diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index a68da5ddfc89fe3dbd8b4f12804b21b3f3270d47..04fcf11ed82d12ee2e327f9b417be2b62cda9de8 100644 (file)
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -52,7 +52,4 @@
 
 /* Defines for SPL */
 
-/* For USB EHCI controller */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH  0x10
-
 #endif /* _TEGRA30_COMMON_H_ */