select SUPPORT_SPL
select GPIO_EXTRA_HEADER
select MISC
- select IMX_SENTINEL
+ select IMX_ELE
imply CMD_DM
config ARCH_IMX9
select SUPPORT_SPL
select GPIO_EXTRA_HEADER
select MISC
- select IMX_SENTINEL
+ select IMX_ELE
imply CMD_DM
config ARCH_IMXRT
#define ARM_A55_MTR_BUS_CLK_ROOT 1
#define ARM_A55_CLK_ROOT 2
#define M33_CLK_ROOT 3
-#define SENTINEL_CLK_ROOT 4
+#define ELE_CLK_ROOT 4
#define BUS_WAKEUP_CLK_ROOT 5
#define BUS_AON_CLK_ROOT 6
#define WAKEUP_AXI_CLK_ROOT 7
struct udevice *scu_dev;
#endif
-#ifdef CONFIG_IMX_SENTINEL
- struct udevice *s400_dev;
+#ifdef CONFIG_IMX_ELE
+ struct udevice *ele_dev;
u32 soc_rev;
u32 lifecycle;
u32 uid[4];
* Copyright 2021 NXP
*/
-#ifndef __S400_API_H__
-#define __S400_API_H__
+#ifndef __ELE_API_H__
+#define __ELE_API_H__
-#define AHAB_VERSION 0x6
-#define AHAB_CMD_TAG 0x17
-#define AHAB_RESP_TAG 0xe1
+#define ELE_VERSION 0x6
+#define ELE_CMD_TAG 0x17
+#define ELE_RESP_TAG 0xe1
/* ELE commands */
#define ELE_PING_REQ (0x01)
#define ELE_GET_FW_VERSION_REQ (0x9D)
#define ELE_RET_LIFECYCLE_UP_REQ (0xA0)
#define ELE_GET_EVENTS_REQ (0xA2)
+#define ELE_START_RNG (0xA3)
+#define ELE_GENERATE_DEK_BLOB (0xAF)
#define ELE_ENABLE_PATCH_REQ (0xC3)
#define ELE_RELEASE_RDC_REQ (0xC4)
#define ELE_GET_FW_STATUS_REQ (0xC5)
#define ELE_SUCCESS_IND (0xD6)
#define ELE_FAILURE_IND (0x29)
-#define S400_MAX_MSG 255U
+#define ELE_MAX_MSG 255U
-struct sentinel_msg {
+struct ele_msg {
u8 version;
u8 size;
u8 command;
u8 tag;
- u32 data[(S400_MAX_MSG - 1U)];
+ u32 data[(ELE_MAX_MSG - 1U)];
};
-struct sentinel_get_info_data {
+struct ele_get_info_data {
u32 hdr;
u32 soc;
u32 lc;
u32 state;
};
-int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response);
-int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response);
-int ahab_release_container(u32 *response);
-int ahab_verify_image(u32 img_id, u32 *response);
-int ahab_forward_lifecycle(u16 life_cycle, u32 *response);
-int ahab_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response);
-int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *response);
-int ahab_release_caam(u32 core_did, u32 *response);
-int ahab_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response);
-int ahab_dump_buffer(u32 *buffer, u32 buffer_length);
-int ahab_get_info(struct sentinel_get_info_data *info, u32 *response);
-int ahab_get_fw_status(u32 *status, u32 *response);
-int ahab_release_m33_trout(void);
-int ahab_get_events(u32 *events, u32 *events_cnt, u32 *response);
+int ele_release_rdc(u8 core_id, u8 xrdc, u32 *response);
+int ele_auth_oem_ctnr(ulong ctnr_addr, u32 *response);
+int ele_release_container(u32 *response);
+int ele_verify_image(u32 img_id, u32 *response);
+int ele_forward_lifecycle(u16 life_cycle, u32 *response);
+int ele_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response);
+int ele_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *response);
+int ele_release_caam(u32 core_did, u32 *response);
+int ele_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response);
+int ele_get_events(u32 *events, u32 *events_cnt, u32 *response);
+int ele_dump_buffer(u32 *buffer, u32 buffer_length);
+int ele_get_info(struct ele_get_info_data *info, u32 *response);
+int ele_get_fw_status(u32 *status, u32 *response);
+int ele_release_m33_trout(void);
#endif
#include <command.h>
#include <errno.h>
#include <asm/io.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/mach-imx/sys_proto.h>
#include <asm/arch-imx/cpu.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/image.h>
#include <console.h>
#include <cpu_func.h>
-#include <asm/mach-imx/ahab.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
flush_dcache_range(IMG_CONTAINER_BASE,
IMG_CONTAINER_BASE + ALIGN(length, CONFIG_SYS_CACHELINE_SIZE) - 1);
- err = ahab_auth_oem_ctnr(IMG_CONTAINER_BASE, &resp);
+ err = ele_auth_oem_ctnr(IMG_CONTAINER_BASE, &resp);
if (err) {
printf("Authenticate container hdr failed, return %d, resp 0x%x\n",
err, resp);
int err;
u32 resp;
- err = ahab_release_container(&resp);
+ err = ele_release_container(&resp);
if (err) {
printf("Error: release container failed, resp 0x%x!\n", resp);
display_ahab_auth_ind(resp);
int err;
u32 resp;
- err = ahab_verify_image(image_index, &resp);
+ err = ele_verify_image(image_index, &resp);
if (err) {
printf("Authenticate img %d failed, return %d, resp 0x%x\n",
image_index, err, resp);
return -EPERM;
}
- err = ahab_forward_lifecycle(8, &resp);
+ err = ele_forward_lifecycle(8, &resp);
if (err != 0) {
printf("Error in forward lifecycle to OEM closed\n");
return -EIO;
int ret, i = 0;
do {
- ret = ahab_dump_buffer(buffer, 32);
+ ret = ele_dump_buffer(buffer, 32);
if (ret < 0) {
printf("Error in dump AHAB log\n");
return -EIO;
display_life_cycle(lc);
- ret = ahab_get_events(events, &cnt, NULL);
+ ret = ele_get_events(events, &cnt, NULL);
if (ret) {
printf("Get ELE EVENTS error %d\n", ret);
return CMD_RET_FAILURE;
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/mu_hal.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/arch/rdc.h>
#include <div64.h>
int release_rdc(enum rdc_type type)
{
ulong s_mu_base = 0x27020000UL;
- struct sentinel_msg msg;
+ struct ele_msg msg;
int ret;
u32 rdc_id = (type == RDC_XRDC) ? 0x78 : 0x74;
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_RELEASE_RDC_REQ;
msg.data[0] = (rdc_id << 8) | 0x2; /* A35 XRDC */
mrgd[4] |= ((access & 0xFFF) << 16);
}
- /* not handle other cases, since S400 only set ACCESS1 and 2 */
+ /* not handle other cases, since ELE only set ACCESS1 and 2 */
writel(mrgd[4], xrdc_base + off + 0x10);
return;
}
void xrdc_init_mrc(void)
{
- /* Re-config MRC3 for SRAM0 in case protected by S400 */
+ /* Re-config MRC3 for SRAM0 in case protected by ELE */
xrdc_config_mrc_w0_w1(3, 0, 0x22010000, 0x10000);
xrdc_config_mrc_dx_perm(3, 0, 0, 1);
xrdc_config_mrc_dx_perm(3, 0, 1, 1);
xrdc_config_mrc_dx_perm(5, 0, 1, 1);
xrdc_config_mrc_w3_w4(5, 0, 0x0, 0x80000FFF);
- /* Set MRC6 for DDR access from Sentinel */
+ /* Set MRC6 for DDR access from ELE */
xrdc_config_mrc_w0_w1(6, 0, CFG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE);
xrdc_config_mrc_dx_perm(6, 0, 4, 1);
xrdc_config_mrc_w3_w4(6, 0, 0x0, 0x80000FFF);
val &= ~(0xFU << offset);
/* MBC0-3
- * Global 0, 0x7777 secure pri/user read/write/execute, S400 has already set it.
+ * Global 0, 0x7777 secure pri/user read/write/execute, ELE has already set it.
* So select MBC0_MEMN_GLBAC0
*/
if (sec_access) {
continue;
/* MRC0,1
- * Global 0, 0x7777 secure pri/user read/write/execute, S400 has already set it.
+ * Global 0, 0x7777 secure pri/user read/write/execute, ELE has already set it.
* So select MRCx_MEMN_GLBAC0
*/
if (sec_access) {
#include <event.h>
#include <spl.h>
#include <asm/arch/rdc.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/mach-imx/mu_hal.h>
#include <cpu_func.h>
#include <asm/setup.h>
}
#endif
-static void set_cpu_info(struct sentinel_get_info_data *info)
+static void set_cpu_info(struct ele_get_info_data *info)
{
gd->arch.soc_rev = info->soc;
gd->arch.lifecycle = info->lc;
u32 res;
int ret;
- ret = ahab_read_common_fuse(1, uid, 4, &res);
+ ret = ele_read_common_fuse(1, uid, 4, &res);
if (ret)
- printf("ahab read fuse failed %d, 0x%x\n", ret, res);
+ printf("ele read fuse failed %d, 0x%x\n", ret, res);
else
printf("UID 0x%x,0x%x,0x%x,0x%x\n", uid[0], uid[1], uid[2], uid[3]);
struct udevice *devp;
int ret;
u32 res;
- struct sentinel_get_info_data *info = (struct sentinel_get_info_data *)SRAM0_BASE;
+ struct ele_get_info_data *info = (struct ele_get_info_data *)SRAM0_BASE;
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(imx8ulp_mu), &devp);
if (ret) {
return ret;
}
- ret = ahab_get_info(info, &res);
+ ret = ele_get_info(info, &res);
if (ret) {
- printf("ahab_get_info failed %d\n", ret);
+ printf("ele_get_info failed %d\n", ret);
/* fallback to A0.1 revision */
- memset((void *)info, 0, sizeof(struct sentinel_get_info_data));
+ memset((void *)info, 0, sizeof(struct ele_get_info_data));
info->soc = 0xa000084d;
}
* CM33 Cache
* PowerQuad RAM
* ETF RAM
- * Sentinel PKC, Data RAM1, Inst RAM0/1
- * Sentinel ROM
+ * ELE PKC, Data RAM1, Inst RAM0/1
+ * ELE ROM
* uPower IRAM/DRAM
* uPower ROM
* CM33 ROM
* SSRAM Partition 7_a(128KB)
* SSRAM Partition 7_b(64KB)
* SSRAM Partition 7_c(64KB)
- * Sentinel Data RAM0, Inst RAM2
+ * ELE Data RAM0, Inst RAM2
*/
/* MIPI-CSI FIFO BIT28 not set */
memon = 0x3FFFFFEFFFFFFCUL;
/* Set A55 mtr bus to 133M */
{ARM_A55_MTR_BUS_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3},
- /* Sentinel to 133M */
- {SENTINEL_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3},
+ /* ELE to 133M */
+ {ELE_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3},
/* Bus_wakeup to 133M */
{BUS_WAKEUP_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3},
/* Bus_AON to 133M */
{ARM_A55_PERIPH_CLK_ROOT, SYS_PLL_PFD0, 3},
/* Set A55 mtr bus to 133M */
{ARM_A55_MTR_BUS_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3},
- /* Sentinel to 200M */
- {SENTINEL_CLK_ROOT, SYS_PLL_PFD1_DIV2, 2},
+ /* ELE to 200M */
+ {ELE_CLK_ROOT, SYS_PLL_PFD1_DIV2, 2},
/* Bus_wakeup to 133M */
{BUS_WAKEUP_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3},
/* Bus_AON to 133M */
{ ARM_A55_MTR_BUS_CLK_ROOT, 2 },
{ ARM_A55_CLK_ROOT, 0 },
{ M33_CLK_ROOT, 2 },
- { SENTINEL_CLK_ROOT, 2 },
+ { ELE_CLK_ROOT, 2 },
{ BUS_WAKEUP_CLK_ROOT, 2 },
{ BUS_AON_CLK_ROOT, 2 },
{ WAKEUP_AXI_CLK_ROOT, 0 },
#include <asm/setup.h>
#include <asm/bootm.h>
#include <asm/arch-imx/cpu.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <fuse.h>
#include <asm/arch/ddr.h>
return val;
}
-static void set_cpu_info(struct sentinel_get_info_data *info)
+static void set_cpu_info(struct ele_get_info_data *info)
{
gd->arch.soc_rev = info->soc;
gd->arch.lifecycle = info->lc;
struct udevice *devp;
int node, ret;
u32 res;
- struct sentinel_get_info_data info;
+ struct ele_get_info_data info;
node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "fsl,imx93-mu-s4");
if (gd->flags & GD_FLG_RELOC)
return 0;
- ret = ahab_get_info(&info, &res);
+ ret = ele_get_info(&info, &res);
if (ret)
return ret;
mem_id = SRC_MEM_MEDIA;
scr = BIT(5);
- /* Enable S400 handshake */
+ /* Enable ELE handshake */
struct blk_ctrl_s_aonmix_regs *s_regs =
(struct blk_ctrl_s_aonmix_regs *)BLK_CTRL_S_ANOMIX_BASE_ADDR;
while (!(val & SRC_MIX_SLICE_FUNC_STAT_RST_STAT))
val = readl(&mix_regs->func_stat);
- /* Release Sentinel TROUT */
- ahab_release_m33_trout();
+ /* Release ELE TROUT */
+ ele_release_m33_trout();
/* Mask WDOG1 IRQ from A55, we use it for M33 reset */
setbits_le32(&s_regs->ca55_irq_mask[1], BIT(6));
/* Turn on WDOG1 clock */
ccm_lpcg_on(CCGR_WDG1, 1);
- /* Set sentinel LP handshake for M33 reset */
+ /* Set ELE LP handshake for M33 reset */
setbits_le32(&s_regs->lp_handshake[0], BIT(6));
/* Clear M33 TCM for ECC */
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
#include <div64.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/mach-imx/mu_hal.h>
#define DID_NUM 16
val &= ~(0xFU << offset);
/* MBC0-3
- * Global 0, 0x7777 secure pri/user read/write/execute, S400 has already set it.
+ * Global 0, 0x7777 secure pri/user read/write/execute, ELE has already set it.
* So select MBC0_MEMN_GLBAC0
*/
if (sec_access) {
continue;
/* MRC0,1
- * Global 0, 0x7777 secure pri/user read/write/execute, S400 has already set it.
+ * Global 0, 0x7777 secure pri/user read/write/execute, ELE has already set it.
* So select MRCx_MEMN_GLBAC0
*/
if (sec_access) {
int release_rdc(u8 xrdc)
{
ulong s_mu_base = 0x47520000UL;
- struct sentinel_msg msg;
+ struct ele_msg msg;
int ret;
u32 rdc_id;
return -EINVAL;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_RELEASE_RDC_REQ;
msg.data[0] = (rdc_id << 8) | 0x2; /* A55 */
/* DDR */
trdc_mrc_set_control(0x49010000, 0, 0, 0x7777);
- /* S400*/
+ /* ELE */
trdc_mrc_region_config(0x49010000, 0, 0, 0x80000000, 0xFFFFFFFF, false, 0);
/* MTR */
#include <asm/arch/ddr.h>
#include <asm/arch/rdc.h>
#include <asm/arch/upower.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
DECLARE_GLOBAL_DATA_PTR;
u32 fw_version, sha1, res;
int ret;
- ret = ahab_get_fw_version(&fw_version, &sha1, &res);
+ ret = ele_get_fw_version(&fw_version, &sha1, &res);
if (ret) {
- printf("ahab get firmware version failed %d, 0x%x\n", ret, res);
+ printf("ele get firmware version failed %d, 0x%x\n", ret, res);
} else {
printf("ELE firmware version %u.%u.%u-%x",
(fw_version & (0x00ff0000)) >> 16,
set_lpav_qos();
/* Enable A35 access to the CAAM */
- ret = ahab_release_caam(0x7, &res);
+ ret = ele_release_caam(0x7, &res);
if (ret)
- printf("ahab release caam failed %d, 0x%x\n", ret, res);
+ printf("ele release caam failed %d, 0x%x\n", ret, res);
}
void board_init_f(ulong dummy)
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/arch-mx7ulp/gpio.h>
#include <asm/mach-imx/syscounter.h>
-#include <asm/mach-imx/s400_api.h>
#include <dm/uclass.h>
#include <dm/device.h>
#include <dm/uclass-internal.h>
To compile this driver as a module, choose M here: the module
will be called npcm_otp.
-config IMX_SENTINEL
- bool "Enable i.MX Sentinel MU driver and API"
+config IMX_ELE
+ bool "Enable i.MX EdgeLock Enclave MU driver and API"
depends on MISC && (ARCH_IMX9 || ARCH_IMX8ULP)
help
If you say Y here to enable Message Unit driver to work with
obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
obj-$(CONFIG_IMX8) += imx8/
-obj-$(CONFIG_IMX_SENTINEL) += sentinel/
+obj-$(CONFIG_IMX_ELE) += imx_ele/
obj-$(CONFIG_LED_STATUS) += status_led.o
obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
# SPDX-License-Identifier: GPL-2.0+
-obj-y += s400_api.o s4mu.o
+obj-y += ele_api.o ele_mu.o
obj-$(CONFIG_CMD_FUSE) += fuse.o
#include <malloc.h>
#include <asm/io.h>
#include <dm.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <misc.h>
DECLARE_GLOBAL_DATA_PTR;
-int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response)
+int ele_release_rdc(u8 core_id, u8 xrdc, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_RELEASE_RDC_REQ;
switch (xrdc) {
return ret;
}
-int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response)
+int ele_auth_oem_ctnr(ulong ctnr_addr, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 3;
msg.command = ELE_OEM_CNTN_AUTH_REQ;
msg.data[0] = upper_32_bits(ctnr_addr);
return ret;
}
-int ahab_release_container(u32 *response)
+int ele_release_container(u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_RELEASE_CONTAINER_REQ;
return ret;
}
-int ahab_verify_image(u32 img_id, u32 *response)
+int ele_verify_image(u32 img_id, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_VERIFY_IMAGE_REQ;
msg.data[0] = 1 << img_id;
return ret;
}
-int ahab_forward_lifecycle(u16 life_cycle, u32 *response)
+int ele_forward_lifecycle(u16 life_cycle, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_FWD_LIFECYCLE_UP_REQ;
msg.data[0] = life_cycle;
return ret;
}
-int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *response)
+int ele_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
return -EINVAL;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_READ_FUSE_REQ;
msg.data[0] = fuse_id;
return ret;
}
-int ahab_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response)
+int ele_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 3;
msg.command = ELE_WRITE_FUSE_REQ;
msg.data[0] = (32 << 16) | (fuse_id << 5);
return ret;
}
-int ahab_release_caam(u32 core_did, u32 *response)
+int ele_release_caam(u32 core_did, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_RELEASE_CAAM_REQ;
msg.data[0] = core_did;
return ret;
}
-int ahab_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response)
+int ele_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
return -EINVAL;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_GET_FW_VERSION_REQ;
return ret;
}
-int ahab_dump_buffer(u32 *buffer, u32 buffer_length)
+int ele_dump_buffer(u32 *buffer, u32 buffer_length)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret, i = 0;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_DUMP_DEBUG_BUFFER_REQ;
return i;
}
-int ahab_get_info(struct sentinel_get_info_data *info, u32 *response)
+int ele_get_info(struct ele_get_info_data *info, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 4;
msg.command = ELE_GET_INFO_REQ;
msg.data[0] = upper_32_bits((ulong)info);
msg.data[1] = lower_32_bits((ulong)info);
- msg.data[2] = sizeof(struct sentinel_get_info_data);
+ msg.data[2] = sizeof(struct ele_get_info_data);
ret = misc_call(dev, false, &msg, size, &msg, size);
if (ret)
return ret;
}
-int ahab_get_fw_status(u32 *status, u32 *response)
+int ele_get_fw_status(u32 *status, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_GET_FW_STATUS_REQ;
return ret;
}
-int ahab_release_m33_trout(void)
+int ele_release_m33_trout(void)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_ENABLE_RTC_REQ;
return ret;
}
-int ahab_get_events(u32 *events, u32 *events_cnt, u32 *response)
+int ele_get_events(u32 *events, u32 *events_cnt, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret, i = 0;
u32 actual_events;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
return -EINVAL;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_GET_EVENTS_REQ;
#include <dm/lists.h>
#include <dm/root.h>
#include <dm/device-internal.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/arch/imx-regs.h>
#include <linux/iopoll.h>
#include <misc.h>
static int imx8ulp_mu_read(struct mu_type *base, void *data)
{
- struct sentinel_msg *msg = (struct sentinel_msg *)data;
+ struct ele_msg *msg = (struct ele_msg *)data;
int ret;
u8 count = 0;
count++;
/* Check size */
- if (msg->size > S400_MAX_MSG) {
+ if (msg->size > ELE_MAX_MSG) {
*((u32 *)msg) = 0;
return -EINVAL;
}
static int imx8ulp_mu_write(struct mu_type *base, void *data)
{
- struct sentinel_msg *msg = (struct sentinel_msg *)data;
+ struct ele_msg *msg = (struct ele_msg *)data;
int ret;
u8 count = 0;
return -EINVAL;
/* Check size */
- if (msg->size > S400_MAX_MSG)
+ if (msg->size > ELE_MAX_MSG)
return -EINVAL;
/* Write first word */
return ret;
}
- result = ((struct sentinel_msg *)rx_msg)->data[0];
+ result = ((struct ele_msg *)rx_msg)->data[0];
if ((result & 0xff) == 0xd6)
return 0;
/* U-Boot not enable interrupts, so need to enable RX interrupts */
mu_hal_init((ulong)priv->base);
- gd->arch.s400_dev = dev;
+ gd->arch.ele_dev = dev;
return 0;
}
#include <asm/arch/sys_proto.h>
#include <asm/arch/imx-regs.h>
#include <env.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
bool redundancy;
};
-struct s400_map_entry {
+struct ele_map_entry {
s32 fuse_bank;
u32 fuse_words;
u32 fuse_offset;
- u32 s400_index;
+ u32 ele_index;
};
#if defined(CONFIG_IMX8ULP)
0, 1, 8, 12, 16, 22, 24, 25, 26, 27, 36, 41, 51, 56
};
-struct s400_map_entry s400_api_mapping_table[] = {
+struct ele_map_entry ele_api_mapping_table[] = {
{ 1, 8 }, /* LOCK */
{ 2, 8 }, /* ECID */
{ 7, 4, 0, 1 }, /* OTP_UNIQ_ID */
{ 63, 8 },
};
-struct s400_map_entry s400_api_mapping_table[] = {
+struct ele_map_entry ele_api_mapping_table[] = {
{ 7, 1, 7, 63 },
{ 16, 8, },
{ 17, 8, },
return word + word_pos;
}
-static s32 map_s400_fuse_index(u32 bank, u32 word)
+static s32 map_ele_fuse_index(u32 bank, u32 word)
{
- s32 size = ARRAY_SIZE(s400_api_mapping_table);
+ s32 size = ARRAY_SIZE(ele_api_mapping_table);
s32 i;
/* map the fuse from ocotp fuse map to FSB*/
for (i = 0; i < size; i++) {
- if (s400_api_mapping_table[i].fuse_bank != -1 &&
- s400_api_mapping_table[i].fuse_bank == bank) {
- if (word >= s400_api_mapping_table[i].fuse_offset &&
- word < (s400_api_mapping_table[i].fuse_offset +
- s400_api_mapping_table[i].fuse_words))
+ if (ele_api_mapping_table[i].fuse_bank != -1 &&
+ ele_api_mapping_table[i].fuse_bank == bank) {
+ if (word >= ele_api_mapping_table[i].fuse_offset &&
+ word < (ele_api_mapping_table[i].fuse_offset +
+ ele_api_mapping_table[i].fuse_words))
break;
}
}
if (i == size)
return -1; /* Failed to find */
- if (s400_api_mapping_table[i].s400_index != 0)
- return s400_api_mapping_table[i].s400_index;
+ if (ele_api_mapping_table[i].ele_index != 0)
+ return ele_api_mapping_table[i].ele_index;
- return s400_api_mapping_table[i].fuse_bank * 8 + word;
+ return ele_api_mapping_table[i].fuse_bank * 8 + word;
}
#if defined(CONFIG_IMX8ULP)
return 0;
}
- word_index = map_s400_fuse_index(bank, word);
+ word_index = map_ele_fuse_index(bank, word);
if (word_index >= 0) {
u32 data[4];
u32 res, size = 4;
if (word_index != 1)
size = 1;
- ret = ahab_read_common_fuse(word_index, data, size, &res);
+ ret = ele_read_common_fuse(word_index, data, size, &res);
if (ret) {
printf("ahab read fuse failed %d, 0x%x\n", ret, res);
return ret;
return 0;
}
- word_index = map_s400_fuse_index(bank, word);
+ word_index = map_ele_fuse_index(bank, word);
if (word_index >= 0) {
u32 data;
u32 res, size = 1;
int ret;
- ret = ahab_read_common_fuse(word_index, &data, size, &res);
+ ret = ele_read_common_fuse(word_index, &data, size, &res);
if (ret) {
printf("ahab read fuse failed %d, 0x%x\n", ret, res);
return ret;
lock = true;
#endif
- ret = ahab_write_fuse((bank * 8 + word), val, lock, &res);
+ ret = ele_write_fuse((bank * 8 + word), val, lock, &res);
if (ret) {
printf("ahab write fuse failed %d, 0x%x\n", ret, res);
return ret;