]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE
authorShengyu Qu <wiagn233@outlook.com>
Wed, 9 Aug 2023 13:11:31 +0000 (21:11 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 10 Aug 2023 02:58:12 +0000 (10:58 +0800)
Add a Kconfig item to allow SPL to clear stack/GD/malloc area before
using them.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/Kconfig

index 867cbcbe74eb52f1c4a98a4e488f7699442cd01d..6771d8d9198d74b8b3b602d95c1cf26e72d6f350 100644 (file)
@@ -64,6 +64,14 @@ config SPL_SYS_DCACHE_OFF
        help
          Do not enable data cache in SPL.
 
+config SPL_ZERO_MEM_BEFORE_USE
+       bool "Zero memory before use"
+       depends on SPL
+       default n
+       help
+         Zero stack/GD/malloc area in SPL before using them, this is needed for
+         Sifive core devices that uses L2 cache to store SPL.
+
 # board-specific options below
 source "board/AndesTech/ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"