arm: lpc32xx: switch serial console to driver model

On NXP LPC32xx platform for non-SPL builds the change adds
standard (NS16550) and high-speed UARTs to driver model.
Due to specific of DM NS16550 device description UART clock can not be
got in runtime and by default it is set to 13MHz, if board PERIPH_CLK
is different, this should be specified in board configuration file.

For SPL builds HSUARTs are disabled and non-DM NS16550 driver is
compiled, if needed.

The change also updates default configs of devkit3250 and work_92105
boards to reflect updates in platform files.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index b1c3f8f4ad8d722234d87cad5bee61d591ce4074..6f1018607c77f0c2f7901610a9f8948f363b9a0b 100644 (file)
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -5,12 +5,14 @@
  */
 
 #include <common.h>
-#include <asm/arch/cpu.h>
+#include <dm.h>
+#include <ns16550.h>
+#include <dm/platform_data/lpc32xx_hsuart.h>
+
 #include <asm/arch/clk.h>
 #include <asm/arch/uart.h>
 #include <asm/arch/mux.h>
 #include <asm/io.h>
-#include <dm.h>
 
 static struct clk_pm_regs    *clk  = (struct clk_pm_regs *)CLK_PM_BASE;
 static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
@@ -41,6 +43,37 @@ void lpc32xx_uart_init(unsigned int uart_id)
               &clk->u3clk + (uart_id - 3));
 }
 
+#if !CONFIG_IS_ENABLED(OF_CONTROL) && !defined(CONFIG_SPL_BUILD)
+static const struct ns16550_platdata lpc32xx_uart[] = {
+       { UART3_BASE, 2, CONFIG_SYS_NS16550_CLK },
+       { UART4_BASE, 2, CONFIG_SYS_NS16550_CLK },
+       { UART5_BASE, 2, CONFIG_SYS_NS16550_CLK },
+       { UART6_BASE, 2, CONFIG_SYS_NS16550_CLK },
+};
+
+#if defined(CONFIG_LPC32XX_HSUART)
+static const struct lpc32xx_hsuart_platdata lpc32xx_hsuart[] = {
+       { HS_UART1_BASE, },
+       { HS_UART2_BASE, },
+       { HS_UART7_BASE, },
+};
+#endif
+
+U_BOOT_DEVICES(lpc32xx_uarts) = {
+#if defined(CONFIG_LPC32XX_HSUART)
+       { "lpc32xx_hsuart", &lpc32xx_hsuart[0], },
+       { "lpc32xx_hsuart", &lpc32xx_hsuart[1], },
+#endif
+       { "ns16550_serial", &lpc32xx_uart[0], },
+       { "ns16550_serial", &lpc32xx_uart[1], },
+       { "ns16550_serial", &lpc32xx_uart[2], },
+       { "ns16550_serial", &lpc32xx_uart[3], },
+#if defined(CONFIG_LPC32XX_HSUART)
+       { "lpc32xx_hsuart", &lpc32xx_hsuart[2], },
+#endif
+};
+#endif
+
 void lpc32xx_dma_init(void)
 {
        /* Enable DMA interface */

diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h
index d76514e4cb7f809002daf4429d89f6b2a687119b..27e60e1cea4f486adf3b327b2149e7ceb95b443b 100644 (file)
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -16,18 +16,21 @@
 #define CONFIG_NR_DRAM_BANKS_MAX       2
 
 /* UART configuration */
-#if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_CONS_INDEX              (CONFIG_SYS_LPC32XX_UART - 2)
-#elif  (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
+#if    (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
        (CONFIG_SYS_LPC32XX_UART == 7)
-#define CONFIG_LPC32XX_HSUART
-#else
-#error "define CONFIG_SYS_LPC32XX_UART in the range from 1 to 7"
+#if defined(CONFIG_SPL_BUILD)
+/* SPL images do not support LPC32xx HSUART, UART5 is selected for SPL */
+#undef CONFIG_SYS_LPC32XX_UART
+#define CONFIG_SYS_LPC32XX_UART                5
 #endif
 
-#if defined(CONFIG_SYS_NS16550_SERIAL)
+#if !defined(CONFIG_LPC32XX_HSUART)
+#define CONFIG_LPC32XX_HSUART
+#endif
+#endif
 
+#if defined(CONFIG_SPL_BUILD)
+#define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4
 #define CONFIG_SYS_NS16550_CLK         get_serial_clock()
 
@@ -37,14 +40,14 @@
 #define CONFIG_SYS_NS16550_COM4                UART6_BASE
 #endif
 
-#if defined(CONFIG_LPC32XX_HSUART)
-#if    CONFIG_SYS_LPC32XX_UART == 1
-#define HS_UART_BASE                   HS_UART1_BASE
-#elif  CONFIG_SYS_LPC32XX_UART == 2
-#define HS_UART_BASE                   HS_UART2_BASE
-#else  /* CONFIG_SYS_LPC32XX_UART == 7 */
-#define HS_UART_BASE                   HS_UART7_BASE
+#if !defined(CONFIG_SYS_NS16550_CLK)
+#define CONFIG_SYS_NS16550_CLK         13000000
 #endif
+
+#if !defined(CONFIG_LPC32XX_HSUART) || defined(CONFIG_SPL_BUILD)
+#define CONFIG_CONS_INDEX              (CONFIG_SYS_LPC32XX_UART - 2)
+#else
+#define CONFIG_CONS_INDEX              CONFIG_SYS_LPC32XX_UART
 #endif
 
 #define CONFIG_SYS_BAUDRATE_TABLE      \

diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index 64a0fb01b360a7e884a100972b4fc24040e44fe1..0abb8e09e0831eeca21c97bc9b75cf2bca213058 100644 (file)
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_DEVKIT3250=y
+CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL=y
 # CONFIG_CMD_FPGA is not set

diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 1cad3a2d0c4af87e5a4836ecfdd2bcdd590f4079..a5a108ee6e47e71eb11a9d8a947e3bc38cbc827b 100644 (file)
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_WORK_92105=y
+CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL=y
 # CONFIG_CMD_IMLS is not set