ARM: AM43xx: Fix UART clocks enabling

After enabling a module, SW has to wait on IDLEST bit
until it is Fully functional. This wait is missing for UART module
and there is a immediate access of UART registers after this. So there
is a chance of hang on this module( This can happen when we are running
from MPU SRAM). So waiting for IDLEST bit.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
index d0bc2340c83511a69316d0acd0ea5dc99c9e7ca6..31188c85bccb7fcd69644c185494752993551ea8 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
@@ -53,6 +53,8 @@ const struct dpll_regs dpll_ddr_regs = {
 
 void setup_clocks_for_console(void)
 {
+       u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_DISABLED;
+
        /* Do not add any spl_debug prints in this function */
        clrsetbits_le32(&cmwkup->wkclkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK,
                        CD_CLKCTRL_CLKTRCTRL_SW_WKUP <<
@@ -63,6 +65,13 @@ void setup_clocks_for_console(void)
                        MODULE_CLKCTRL_MODULEMODE_MASK,
                        MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN <<
                        MODULE_CLKCTRL_MODULEMODE_SHIFT);
+
+       while ((idlest == MODULE_CLKCTRL_IDLEST_DISABLED) ||
+               (idlest == MODULE_CLKCTRL_IDLEST_TRANSITIONING)) {
+               clkctrl = readl(&cmwkup->wkup_uart0ctrl);
+               idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >>
+                        MODULE_CLKCTRL_IDLEST_SHIFT;
+       }
 }
 
 void enable_basic_clocks(void)