rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399

This commit adds a driver for the RK3399 VOPs capable and all the
necessary plumbing to feed the HDMI encoder. For the VOP-big, this
correctly tracks the ability to feed 10bit RGB data to the encoder.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 049f192ddca3f9bb426d038927d736c985db5907..21e59beb89fe4811b6a75393bc9c61ae8f4fef99 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -201,6 +201,16 @@ enum vop_modes {
 #define V_DSP_OUT_MODE(x)              ((x) & 0xf)
 
 /* VOP_DSP_CTRL1 */
+#define V_RK3399_DSP_MIPI_POL(x)       ((x) << 28)
+#define V_RK3399_DSP_EDP_POL(x)        ((x) << 24)
+#define V_RK3399_DSP_HDMI_POL(x)       ((x) << 20)
+#define V_RK3399_DSP_LVDS_POL(x)       ((x) << 16)
+
+#define M_RK3399_DSP_MIPI_POL          (V_RK3399_DSP_MIPI_POL(0xf))
+#define M_RK3399_DSP_EDP_POL           (V_RK3399_DSP_EDP_POL(0xf))
+#define M_RK3399_DSP_HDMI_POL          (V_RK3399_DSP_HDMI_POL(0xf))
+#define M_RK3399_DSP_LVDS_POL          (V_RK3399_DSP_LVDS_POL(0xf))
+
 #define M_DSP_LAYER3_SEL               (3 << 14)
 #define M_DSP_LAYER2_SEL               (3 << 12)
 #define M_DSP_LAYER1_SEL               (3 << 10)

diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
index 9477ad06a01fa94e658bdcd66cf898747af0d40b..495d5f70fd291fbff82a371857902b110d19f176 100644 (file)
--- a/drivers/video/rockchip/Makefile
+++ b/drivers/video/rockchip/Makefile
@@ -8,6 +8,7 @@
 ifdef CONFIG_VIDEO_ROCKCHIP
 obj-y += rk_vop.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
+obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o

diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c
new file mode 100644 (file)
index 0000000..91a40ab
--- /dev/null
+++ b/drivers/video/rockchip/rk3399_vop.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2015 Google, Inc
+ * Copyright 2014 Rockchip Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <display.h>
+#include <dm.h>
+#include <regmap.h>
+#include <video.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include "rk_vop.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void rk3399_set_pin_polarity(struct udevice *dev,
+                                   enum vop_modes mode, u32 polarity)
+{
+       struct rk_vop_priv *priv = dev_get_priv(dev);
+       struct rk3288_vop *regs = priv->regs;
+
+       /*
+        * The RK3399 VOPs (v3.5 and v3.6) require a per-mode setting of
+        * the polarity configuration (in ctrl1).
+        */
+       switch (mode) {
+       case VOP_MODE_HDMI:
+               clrsetbits_le32(&regs->dsp_ctrl1,
+                               M_RK3399_DSP_HDMI_POL,
+                               V_RK3399_DSP_HDMI_POL(polarity));
+               break;
+
+       case VOP_MODE_EDP:
+               clrsetbits_le32(&regs->dsp_ctrl1,
+                               M_RK3399_DSP_EDP_POL,
+                               V_RK3399_DSP_EDP_POL(polarity));
+               break;
+
+       case VOP_MODE_MIPI:
+               clrsetbits_le32(&regs->dsp_ctrl1,
+                               M_RK3399_DSP_MIPI_POL,
+                               V_RK3399_DSP_MIPI_POL(polarity));
+               break;
+
+       case VOP_MODE_LVDS:
+               /* The RK3399 has neither parallel RGB nor LVDS output. */
+       default:
+               debug("%s: unsupported output mode %x\n", __func__, mode);
+       }
+}
+
+/*
+ * Try some common regulators. We should really get these from the
+ * device tree somehow.
+ */
+static const char * const rk3399_regulator_names[] = {
+       "vcc33_lcd"
+};
+
+static int rk3399_vop_probe(struct udevice *dev)
+{
+       /* Before relocation we don't need to do anything */
+       if (!(gd->flags & GD_FLG_RELOC))
+               return 0;
+
+       /* Probe regulators required for the RK3399 VOP */
+       rk_vop_probe_regulators(dev, rk3399_regulator_names,
+                               ARRAY_SIZE(rk3399_regulator_names));
+
+       return rk_vop_probe(dev);
+}
+
+struct rkvop_driverdata rk3399_lit_driverdata = {
+       .set_pin_polarity = rk3399_set_pin_polarity,
+};
+
+struct rkvop_driverdata rk3399_big_driverdata = {
+       .features = VOP_FEATURE_OUTPUT_10BIT,
+       .set_pin_polarity = rk3399_set_pin_polarity,
+};
+
+static const struct udevice_id rk3399_vop_ids[] = {
+       { .compatible = "rockchip,rk3399-vop-big",
+         .data = (ulong)&rk3399_big_driverdata },
+       { .compatible = "rockchip,rk3399-vop-lit",
+         .data = (ulong)&rk3399_lit_driverdata },
+       { }
+};
+
+static const struct video_ops rk3399_vop_ops = {
+};
+
+U_BOOT_DRIVER(rk3399_vop) = {
+       .name   = "rk3399_vop",
+       .id     = UCLASS_VIDEO,
+       .of_match = rk3399_vop_ids,
+       .ops    = &rk3399_vop_ops,
+       .bind   = rk_vop_bind,
+       .probe  = rk3399_vop_probe,
+       .priv_auto_alloc_size   = sizeof(struct rk_vop_priv),
+};