]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board: pm9261: Update to support DT and DM
authorWenyou.Yang@microchip.com <Wenyou.Yang@microchip.com>
Fri, 21 Jul 2017 09:04:56 +0000 (17:04 +0800)
committerTom Rini <trini@konsulko.com>
Sat, 5 Aug 2017 00:38:37 +0000 (20:38 -0400)
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
board/ronetix/pm9261/Makefile
board/ronetix/pm9261/pm9261.c
configs/pm9261_defconfig
include/configs/pm9261.h

index 3860283a3bddddad54c28a07624ff8db1805e93c..90835d372f3b41838c67005cdf43554490873ea6 100644 (file)
@@ -11,5 +11,5 @@
 #
 
 obj-y += pm9261.o
-obj-y += led.o
+obj-$(CONFIG_RED_LED) += led.o
 obj-$(CONFIG_HAS_DATAFLASH) += partition.o
index 160f8f86d1726ddec3a8bac6edeeb81f4f1dfd02..f338ff8f475cf19b329406e26c5d20afc8c69a4c 100644 (file)
@@ -21,7 +21,6 @@
 
 #include <lcd.h>
 #include <atmel_lcdc.h>
-#include <dataflash.h>
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
 #include <net.h>
 #endif
@@ -178,7 +177,7 @@ extern flash_info_t flash_info[];
 
 void lcd_show_board_info(void)
 {
-       ulong dram_size, nand_size, flash_size, dataflash_size;
+       ulong dram_size, nand_size, flash_size;
        int i;
        char temp[32];
 
@@ -201,17 +200,11 @@ void lcd_show_board_info(void)
        for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
                flash_size += flash_info[i].size;
 
-       dataflash_size = 0;
-       for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++)
-               dataflash_size += (unsigned int) dataflash_info[i].Device.pages_number *
-                               dataflash_info[i].Device.pages_size;
-
        lcd_printf ("%ld MB SDRAM, %ld MB NAND\n%ld MB NOR Flash\n"
                        "%ld MB DataFlash\n",
                dram_size >> 20,
                nand_size >> 20,
-               flash_size >> 20,
-               dataflash_size >> 20);
+               flash_size >> 20);
 }
 #endif /* CONFIG_LCD_INFO */
 
@@ -219,11 +212,6 @@ void lcd_show_board_info(void)
 
 int board_early_init_f(void)
 {
-       at91_periph_clk_enable(ATMEL_ID_PIOA);
-       at91_periph_clk_enable(ATMEL_ID_PIOC);
-
-       at91_seriald_hw_init();
-
        return 0;
 }
 
@@ -238,9 +226,6 @@ int board_init(void)
 #ifdef CONFIG_CMD_NAND
        pm9261_nand_hw_init();
 #endif
-#ifdef CONFIG_HAS_DATAFLASH
-       at91_spi0_hw_init(1 << 0);
-#endif
 #ifdef CONFIG_DRIVER_DM9000
        pm9261_dm9000_hw_init();
 #endif
index 19226733bb815fd26d1c7f2edf4fae5e1d10bcda..a2cbb4c4e0974060790807e0336c9a85b0ede2e7 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_PM9261=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_BOOTDELAY=3
@@ -14,14 +16,31 @@ CONFIG_SYS_PROMPT="pm9261> "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_LCD=y
index b9c93b0f21561f5d917767d09dea0e13caf4e7d7..c4d3d96486381cab86a4cc216f9167e198292588 100644 (file)
 /*
  * Hardware drivers
  */
-#define CONFIG_AT91_GPIO       1
-#define CONFIG_ATMEL_USART     1
-#define CONFIG_USART_BASE              ATMEL_BASE_DBGU
-#define        CONFIG_USART_ID                 ATMEL_ID_SYS
 
 /* LCD */
 #define LCD_BPP                                LCD_COLOR8
 #define CONFIG_ATMEL_LCD               1
 #define CONFIG_ATMEL_LCD_BGR555                1
 
-/* LED */
-#define CONFIG_AT91_LED
-#define CONFIG_RED_LED         GPIO_PIN_PC(12)
-#define CONFIG_GREEN_LED       GPIO_PIN_PC(13)
-#define CONFIG_YELLOW_LED      GPIO_PIN_PC(15)
-
-
 /*
  * BOOTP options
  */
 #define PHYS_SDRAM                             0x20000000
 #define PHYS_SDRAM_SIZE                                0x04000000      /* 64 megs */
 
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS         1
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3    0xD0000000      /* CS3 */
-#define AT91_SPI_CLK                           15000000
-#define DATAFLASH_TCSS                         (0x1a << 16)
-#define DATAFLASH_TCHS                         (0x1 << 24)
-
 /* NAND flash */
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_SYS_MONITOR_BASE                \
-               (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
 #define CONFIG_ENV_OFFSET      0x4200
-#define CONFIG_ENV_ADDR                \
-               (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
 #define CONFIG_ENV_SIZE                0x4200
-#define CONFIG_BOOTCOMMAND     "cp.b 0xC0042000 0x22000000 0x210000; bootm"
+#define CONFIG_ENV_SECT_SIZE   0x210
+#define CONFIG_ENV_SPI_MAX_HZ  15000000
+#define CONFIG_BOOTCOMMAND     "sf probe 0; " \
+                               "sf read 0x22000000 0x84000 0x210000; " \
+                               "bootm 0x22000000"
 #define CONFIG_BOOTARGS                "console=ttyS0,115200 "                 \
                                "root=/dev/mtdblock0 "                  \
                                "mtdparts=atmel_nand:-(root) "          \
                ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
 
 #define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM
-#define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+#define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \
                                GENERATED_GBL_DATA_SIZE)
 
 #endif