*/
#include <common.h>
#include <errno.h>
+#include <marvell_phy.h>
#include <phy.h>
#include <linux/bitops.h>
#include <linux/delay.h>
U_BOOT_PHY_DRIVER(m88e1011s) = {
.name = "Marvell 88E1011S",
- .uid = 0x1410c60,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1101,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1011s_config,
.startup = &m88e1011s_startup,
U_BOOT_PHY_DRIVER(m88e1111s) = {
.name = "Marvell 88E1111S",
- .uid = 0x1410cc0,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1111,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1111s_config,
.startup = &m88e1011s_startup,
U_BOOT_PHY_DRIVER(m88e1118) = {
.name = "Marvell 88E1118",
- .uid = 0x1410e10,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1118,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1118_config,
.startup = &m88e1118_startup,
U_BOOT_PHY_DRIVER(m88e1118r) = {
.name = "Marvell 88E1118R",
- .uid = 0x1410e40,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1116R,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1118_config,
.startup = &m88e1118_startup,
U_BOOT_PHY_DRIVER(m88e1121r) = {
.name = "Marvell 88E1121R",
- .uid = 0x1410cb0,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1121R,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1121_config,
.startup = &genphy_startup,
U_BOOT_PHY_DRIVER(m88e1145) = {
.name = "Marvell 88E1145",
- .uid = 0x1410cd0,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1145,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1145_config,
.startup = &m88e1145_startup,
U_BOOT_PHY_DRIVER(m88e1149s) = {
.name = "Marvell 88E1149S",
- .uid = 0x1410ca0,
- .mask = 0xffffff0,
+ .uid = 0x01410ca0,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1149_config,
.startup = &m88e1011s_startup,
U_BOOT_PHY_DRIVER(m88e1240) = {
.name = "Marvell 88E1240",
- .uid = 0x1410e30,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1240,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1240_config,
.startup = &m88e1011s_startup,
U_BOOT_PHY_DRIVER(m88e151x) = {
.name = "Marvell 88E151x",
- .uid = 0x1410dd0,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1510,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e151x_config,
.startup = &m88e1011s_startup,
U_BOOT_PHY_DRIVER(m88e1310) = {
.name = "Marvell 88E1310",
- .uid = 0x01410e90,
- .mask = 0xffffff0,
+ .uid = MARVELL_PHY_ID_88E1318S,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1310_config,
.startup = &m88e1011s_startup,
U_BOOT_PHY_DRIVER(m88e1680) = {
.name = "Marvell 88E1680",
- .uid = 0x1410ed0,
- .mask = 0xffffff0,
+ .uid = 0x01410ed0,
+ .mask = MARVELL_PHY_ID_MASK,
.features = PHY_GBIT_FEATURES,
.config = &m88e1680_config,
.startup = &genphy_startup,
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _MARVELL_PHY_H
+#define _MARVELL_PHY_H
+
+/* Mask used for ID comparisons */
+#define MARVELL_PHY_ID_MASK 0xfffffff0
+
+/* Known PHY IDs */
+#define MARVELL_PHY_ID_88E1101 0x01410c60
+#define MARVELL_PHY_ID_88E1112 0x01410c90
+#define MARVELL_PHY_ID_88E1111 0x01410cc0
+#define MARVELL_PHY_ID_88E1118 0x01410e10
+#define MARVELL_PHY_ID_88E1121R 0x01410cb0
+#define MARVELL_PHY_ID_88E1145 0x01410cd0
+#define MARVELL_PHY_ID_88E1149R 0x01410e50
+#define MARVELL_PHY_ID_88E1240 0x01410e30
+#define MARVELL_PHY_ID_88E1318S 0x01410e90
+#define MARVELL_PHY_ID_88E1340S 0x01410dc0
+#define MARVELL_PHY_ID_88E1116R 0x01410e40
+#define MARVELL_PHY_ID_88E1510 0x01410dd0
+#define MARVELL_PHY_ID_88E1540 0x01410eb0
+#define MARVELL_PHY_ID_88E1545 0x01410ea0
+#define MARVELL_PHY_ID_88E1548P 0x01410ec0
+#define MARVELL_PHY_ID_88E3016 0x01410e60
+#define MARVELL_PHY_ID_88X3310 0x002b09a0
+#define MARVELL_PHY_ID_88E2110 0x002b09b0
+#define MARVELL_PHY_ID_88X2222 0x01410f10
+
+/* Marvel 88E1111 in Finisar SFP module with modified PHY ID */
+#define MARVELL_PHY_ID_88E1111_FINISAR 0x01ff0cc0
+
+/* These Ethernet switch families contain embedded PHYs, but they do
+ * not have a model ID. So the switch driver traps reads to the ID2
+ * register and returns the switch family ID
+ */
+#define MARVELL_PHY_ID_88E6341_FAMILY 0x01410f41
+#define MARVELL_PHY_ID_88E6390_FAMILY 0x01410f90
+#define MARVELL_PHY_ID_88E6393_FAMILY 0x002b0b9b
+
+#define MARVELL_PHY_FAMILY_ID(id) ((id) >> 4)
+
+/* struct phy_device dev_flags definitions */
+#define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001
+#define MARVELL_PHY_M1118_DNS323_LEDS 0x00000002
+#define MARVELL_PHY_LED0_LINK_LED1_ACTIVE 0x00000004
+
+#endif /* _MARVELL_PHY_H */