};
unsigned long root_freq[] = {7372800, 14745600, 19200000, 29491200,
- 32000000, 48000000, 64000000, 80000000,
- 96000000, 100000000};
+ 32000000, 48000000, 64000000, 80000000,
+ 96000000, 100000000};
/**
* get_clk_cfg() - Get clock rate to apply on clock supplier.
*
* Return: frequency, supported by clock supplier, multiple of clk_freq.
*/
-static int get_clk_div_rate(u32 baud,
- u64 sampling_rate, u32 *clk_div)
+static int get_clk_div_rate(u32 baud, u64 sampling_rate, u32 *clk_div)
{
unsigned long ser_clk;
unsigned long desired_clk;
}
static inline void geni_serial_baud(phys_addr_t base_address, u32 clk_div,
- int baud)
+ int baud)
{
u32 s_clk_cfg = 0;
* reached.
*/
static bool qcom_geni_serial_poll_bit(const struct udevice *dev, int offset,
- int field, bool set)
+ int field, bool set)
{
u32 reg;
struct msm_serial_data *priv = dev_get_priv(dev);