arm: dts: k3-am642-evm/sk: Enable OSPI support in SPL

Add bootph DT tags to enable OSPI in SPL.
Set OSPI regs for R5 SPL to address OSPI's boot region.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>

diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
index b84307824368df132540e44964a1ee3027f07107..60b219c0be5b2555dcb543c5d407db9619eaa7d3 100644 (file)
--- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
@@ -182,3 +182,19 @@
 &cpsw_port2 {
        status = "disabled";
 };
+
+&ospi0_pins_default {
+       bootph-all;
+};
+
+&fss {
+       bootph-all;
+};
+
+&ospi0 {
+       bootph-all;
+
+       flash@0 {
+               bootph-all;
+       };
+};

diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
index 64b3c3af630b78307c01dcb5bd94888882200e57..6825c07df35f42c9023008c22e1e9d429ad44dd6 100644 (file)
--- a/arch/arm/dts/k3-am642-r5-evm.dts
+++ b/arch/arm/dts/k3-am642-r5-evm.dts
@@ -120,3 +120,8 @@
        /delete-property/ assigned-clock-parents;
        /delete-property/ power-domains;
 };
+
+&ospi0 {
+       reg = <0x00 0x0fc40000 0x00 0x100>,
+             <0x00 0x60000000 0x00 0x8000000>;
+};

diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts
index daa483a781150f9cc42033bb81a31c6f43f38a84..60d747ddd5fd5cb5d6a9591b13327a816cec10be 100644 (file)
--- a/arch/arm/dts/k3-am642-r5-sk.dts
+++ b/arch/arm/dts/k3-am642-r5-sk.dts
@@ -103,3 +103,8 @@
        /delete-property/ assigned-clock-parents;
        /delete-property/ power-domains;
 };
+
+&ospi0 {
+       reg = <0x00 0x0fc40000 0x00 0x100>,
+             <0x00 0x60000000 0x00 0x8000000>;
+};

diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index 2eb227c1d001ca0bb59bc2d21cccfd966204a67d..2b42c7419069564263d30c981a6e3aa458cd5f27 100644 (file)
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -211,3 +211,19 @@
 &serdes_refclk {
        bootph-all;
 };
+
+&ospi0_pins_default {
+       bootph-all;
+};
+
+&fss {
+       bootph-all;
+};
+
+&ospi0 {
+       bootph-all;
+
+       flash@0 {
+               bootph-all;
+       };
+};