]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: k3-am654: copy bootph properties to a53 dts
authorBryan Brattlof <bb@ti.com>
Fri, 29 Dec 2023 17:47:02 +0000 (11:47 -0600)
committerTom Rini <trini@konsulko.com>
Wed, 3 Jan 2024 13:36:37 +0000 (08:36 -0500)
In order to unify the R5 board dtb file with the Linux board dtb file,
we will need to copy all bootph-pre-ram properties to the *-u-boot.dtsi
overlay.

Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
arch/arm/dts/k3-am654-base-board-u-boot.dtsi
arch/arm/dts/k3-am654-r5-base-board.dts

index f29cecf870bcd1be61c022390fbf7e29219c7bd1..4b1e8ce2c920ca527d51597d700e7fd21065bea7 100644 (file)
@@ -5,6 +5,166 @@
 
 #include "k3-am65x-binman.dtsi"
 
+&vtt_supply {
+       bootph-pre-ram;
+};
+
+&cbass_main {
+       bootph-pre-ram;
+};
+
+&main_navss {
+       bootph-pre-ram;
+};
+
+&cbass_mcu {
+       bootph-pre-ram;
+};
+
+&mcu_navss {
+       bootph-pre-ram;
+};
+
+&mcu_ringacc {
+       bootph-pre-ram;
+};
+
+&mcu_udmap {
+       bootph-pre-ram;
+};
+
+&wkup_gpio0 {
+       bootph-pre-ram;
+};
+
+&secure_proxy_main {
+       bootph-pre-ram;
+};
+
+&cbass_wakeup {
+       bootph-pre-ram;
+
+       chipid@43000014 {
+               bootph-pre-ram;
+       };
+};
+
+&dmsc {
+       bootph-pre-ram;
+};
+
+&k3_pds {
+       bootph-pre-ram;
+};
+
+&k3_clks {
+       bootph-pre-ram;
+};
+
+&k3_reset {
+       bootph-pre-ram;
+};
+
+&main_uart0 {
+       bootph-pre-ram;
+};
+
+&wkup_vtm0 {
+       bootph-pre-ram;
+};
+
+&wkup_pmx0 {
+       bootph-pre-ram;
+};
+
+&wkup_uart0_pins_default {
+       bootph-pre-ram;
+};
+
+&wkup_vtt_pins_default {
+       bootph-pre-ram;
+};
+
+&mcu_uart0_pins_default {
+       bootph-pre-ram;
+};
+
+&wkup_i2c0_pins_default {
+       bootph-pre-ram;
+};
+
+&mcu_fss0_ospi0_pins_default {
+       bootph-pre-ram;
+};
+
+&main_pmx0 {
+       bootph-pre-ram;
+};
+
+&main_uart0_pins_default {
+       bootph-pre-ram;
+};
+
+&main_mmc0_pins_default {
+       bootph-pre-ram;
+};
+
+&main_mmc1_pins_default {
+       bootph-pre-ram;
+};
+
+&usb0_pins_default {
+       bootph-pre-ram;
+};
+
+&main_pmx1 {
+       bootph-pre-ram;
+};
+
+&sdhci0 {
+       bootph-pre-ram;
+};
+
+&sdhci1 {
+       bootph-pre-ram;
+};
+
+&wkup_i2c0 {
+       bootph-pre-ram;
+};
+
+&vdd_mpu {
+       bootph-pre-ram;
+};
+
+&ospi0 {
+       bootph-pre-ram;
+
+       flash@0 {
+               bootph-pre-ram;
+       };
+};
+
+&dwc3_0 {
+       bootph-pre-ram;
+};
+
+&usb0_phy {
+       bootph-pre-ram;
+};
+
+&usb0 {
+       bootph-pre-ram;
+};
+
+&scm_conf {
+       bootph-pre-ram;
+};
+
+&fss {
+       bootph-pre-ram;
+};
+
 &pru0_0 {
        remoteproc-name = "pru0_0";
 };
index d75c7bf3fe6625ff99b8d7e1f44f7b2684b68c5a..8f55dab508ee655544538169cfae18e7f4771fa1 100644 (file)
                regulator-max-microvolt = <3300000>;
                gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
                states = <0 0x0 3300000 0x1>;
-               bootph-pre-ram;
        };
 };
 
 &cbass_main {
-       bootph-pre-ram;
-
        timer1: timer@40400000 {
                compatible = "ti,omap5430-timer";
                reg = <0x0 0x40400000 0x0 0x80>;
                clock-frequency = <25000000>;
                bootph-all;
        };
-
-       main_navss: bus@30800000 {
-               bootph-pre-ram;
-       };
 };
 
 &cbass_mcu {
-       bootph-pre-ram;
-
        mcu_secproxy: secproxy@28380000 {
                compatible = "ti,am654-secure-proxy";
                reg = <0x0 0x2a380000 0x0 0x80000>,
@@ -87,8 +78,6 @@
        };
 
        mcu_navss: bus@28380000 {
-               bootph-pre-ram;
-
                ringacc@2b800000 {
                        reg =   <0x0 0x2b800000 0x0 0x400000>,
                                <0x0 0x2b000000 0x0 0x400000>,
@@ -96,7 +85,6 @@
                                <0x0 0x2a500000 0x0 0x40000>,
                                <0x0 0x28440000 0x0 0x40000>;
                        reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
-                       bootph-pre-ram;
                        ti,dma-ring-reset-quirk;
                };
 
                                <0x0 0x28400000 0x0 0x2000>;
                        reg-names = "gcfg", "rchan", "rchanrt", "tchan",
                                            "tchanrt", "rflow";
-                       bootph-pre-ram;
                };
        };
 };
 
-&k3_pds {
-       bootph-pre-ram;
-};
-
-&k3_clks {
-       bootph-pre-ram;
-};
-
-&k3_reset {
-       bootph-pre-ram;
-};
-
-&wkup_gpio0 {
-       bootph-pre-ram;
-};
-
-&secure_proxy_main {
-       bootph-pre-ram;
-};
-
 &cbass_wakeup {
-       bootph-pre-ram;
-
        sysctrler: sysctrler {
                compatible = "ti,am654-system-controller";
                mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
                clock-frequency = <200000000>;
                bootph-pre-ram;
        };
-
-       chipid@43000014 {
-               bootph-pre-ram;
-       };
 };
 
 &dmsc {
-       bootph-pre-ram;
-
        mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
        mbox-names = "tx", "rx", "notify";
        ti,host-id = <4>;
        ti,secure-host;
-
-       k3_sysreset: sysreset-controller {
-               compatible = "ti,sci-sysreset";
-               bootph-pre-ram;
-       };
 };
 
 &wkup_uart0 {
-       bootph-pre-ram;
        pinctrl-names = "default";
        pinctrl-0 = <&wkup_uart0_pins_default>;
        status = "okay";
+       bootph-pre-ram;
 };
 
 &mcu_uart0 {
-       bootph-pre-ram;
        pinctrl-names = "default";
        pinctrl-0 = <&mcu_uart0_pins_default>;
        clock-frequency = <48000000>;
        /delete-property/ power-domains;
        status = "okay";
+       bootph-pre-ram;
 };
 
 &main_uart0 {
        pinctrl-0 = <&main_uart0_pins_default>;
        power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
        status = "okay";
-       bootph-pre-ram;
 };
 
 &wkup_vtm0 {
        compatible = "ti,am654-vtm", "ti,am654-avs";
        vdd-supply-3 = <&vdd_mpu>;
        vdd-supply-4 = <&vdd_mpu>;
-       bootph-pre-ram;
 };
 
 &wkup_pmx0 {
-       bootph-pre-ram;
        wkup_uart0_pins_default: wkup_uart0_pins_default {
                pinctrl-single,pins = <
                        AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0)  /* (AB1) WKUP_UART0_RXD */
                        AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1)  /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
                        AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
                >;
-               bootph-pre-ram;
        };
 
        wkup_vtt_pins_default: wkup_vtt_pins_default {
                pinctrl-single,pins = <
                        AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7)  /* WKUP_GPIO0_28 */
                >;
-               bootph-pre-ram;
        };
 
        mcu_uart0_pins_default: mcu_uart0_pins_default {
                        AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4)  /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
                        AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
                >;
-               bootph-pre-ram;
        };
 
        wkup_i2c0_pins_default: wkup-i2c0-pins-default {
                        AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
                        AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
                >;
-               bootph-pre-ram;
        };
 
        mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
                        AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
                        AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
                >;
-               bootph-pre-ram;
        };
 };
 
 &main_pmx0 {
-       bootph-pre-ram;
        main_uart0_pins_default: main-uart0-pins-default {
                pinctrl-single,pins = <
                        AM65X_IOPAD(0x01e4, PIN_INPUT, 0)       /* (AF11) UART0_RXD */
                        AM65X_IOPAD(0x01ec, PIN_INPUT, 0)       /* (AG11) UART0_CTSn */
                        AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)      /* (AD11) UART0_RTSn */
                >;
-               bootph-pre-ram;
        };
 
        main_mmc0_pins_default: main_mmc0_pins_default {
                        AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0)        /* (D25) MMC0_DAT7 */
                        AM65X_IOPAD(0x01b0, PIN_INPUT, 0)               /* (C25) MMC0_DS */
                >;
-               bootph-pre-ram;
        };
 
        main_mmc1_pins_default: main_mmc1_pins_default {
                        AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0)        /* (B24) MMC1_SDCD */
                        AM65X_IOPAD(0x02e0, PIN_INPUT, 0)               /* (C24) MMC1_SDWP */
                >;
-               bootph-pre-ram;
        };
 
        usb0_pins_default: usb0_pins_default {
                pinctrl-single,pins = <
                        AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
                >;
-               bootph-pre-ram;
        };
 };
 
-&main_pmx1 {
-       bootph-pre-ram;
-};
-
 &memorycontroller {
        vtt-supply = <&vtt_supply>;
        pinctrl-names = "default";
        pinctrl-0 = <&main_mmc0_pins_default>;
        /delete-property/ power-domains;
        ti,driver-strength-ohm = <50>;
-       bootph-pre-ram;
 };
 
 &sdhci1 {
        pinctrl-0 = <&main_mmc1_pins_default>;
        /delete-property/ power-domains;
        ti,driver-strength-ohm = <50>;
-       bootph-pre-ram;
 };
 
 &wkup_i2c0 {
        pinctrl-names = "default";
        pinctrl-0 = <&wkup_i2c0_pins_default>;
        clock-frequency = <400000>;
-       bootph-pre-ram;
 
        vdd_mpu: tps62363@60 {
                compatible = "ti,tps62363";
                regulator-boot-on;
                ti,vsel0-state-high;
                ti,vsel1-state-high;
-               bootph-pre-ram;
        };
 };
 
                cdns,read-delay = <0>;
                #address-cells = <1>;
                #size-cells = <1>;
-               bootph-pre-ram;
        };
 };
 
 &main_pmx0 {
-       bootph-pre-ram;
        usb0_pins_default: usb0_pins_default {
                pinctrl-single,pins = <
                        AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
                >;
-               bootph-pre-ram;
        };
 };
 
 &dwc3_0 {
        status = "okay";
-       bootph-pre-ram;
        /delete-property/ clocks;
        /delete-property/ power-domains;
        /delete-property/ assigned-clocks;
 
 &usb0_phy {
        status = "okay";
-       bootph-pre-ram;
        /delete-property/ clocks;
 };
 
        pinctrl-names = "default";
        pinctrl-0 = <&usb0_pins_default>;
        dr_mode = "peripheral";
-       bootph-pre-ram;
-};
-
-&scm_conf {
-       bootph-pre-ram;
 };
 
 &davinci_mdio {
 &usb1 {
        dr_mode = "peripheral";
 };
-
-&fss {
-       bootph-pre-ram;
-};