#include <dm/device_compat.h>
#include <linux/bitops.h>
#include <linux/delay.h>
+#include <linux/iopoll.h>
#include "serial_stm32.h"
#include <dm/device_compat.h>
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
struct clk clk;
struct reset_ctl reset;
+ u32 isr;
int ret;
+ bool stm32f4;
plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
+ stm32f4 = plat->uart_info->stm32f4;
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0)
return ret;
}
+ /*
+ * before uart initialization, wait for TC bit (Transmission Complete)
+ * in case there is still chars from previous bootstage to transmit
+ */
+ ret = read_poll_timeout(readl, isr, isr & USART_ISR_TC, 10, 150,
+ plat->base + ISR_OFFSET(stm32f4));
+ if (ret) {
+ clk_disable(&clk);
+ return ret;
+ }
+
ret = reset_get_by_index(dev, 0, &reset);
if (!ret) {
reset_assert(&reset);
#define USART_CR3_OVRDIS BIT(12)
#define USART_ISR_TXE BIT(7)
+#define USART_ISR_TC BIT(6)
#define USART_ISR_RXNE BIT(5)
#define USART_ISR_ORE BIT(3)
#define USART_ISR_FE BIT(1)