ARM: dts: k3-am642-sk: Disable cpsw_port1 in SPL

ROM supports cpsw_port2 for Ethernet boot and SPL stages continue to
download images on the same port, therefore there is no need to enable
cpsw_port1. Disable the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts
index 3a17448ca0eb4f485bbfa6c0c9db15ea861d490a..7d1cb8561561f82457c571020f97c69eddbb226a 100644 (file)
--- a/arch/arm/dts/k3-am642-r5-sk.dts
+++ b/arch/arm/dts/k3-am642-r5-sk.dts
@@ -231,23 +231,12 @@
                     &rgmii2_pins_default>;
 };
 
-&cpsw_port1 {
-       phy-mode = "rgmii-rxid";
-       phy-handle = <&cpsw3g_phy0>;
-};
-
 &cpsw_port2 {
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy1>;
 };
 
 &cpsw3g_mdio {
-       cpsw3g_phy0: ethernet-phy@0 {
-               reg = <0>;
-               ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
-               ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
-       };
-
        cpsw3g_phy1: ethernet-phy@1 {
                reg = <1>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;

diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index 2f5cfaa04fd8a3e7e37cf58a6d1b44bf3840aff3..e5c26b8326409f2fa7e520860bc20ac568348160 100644 (file)
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -117,10 +117,6 @@
        u-boot,dm-spl;
 };
 
-&cpsw_port1 {
-       u-boot,dm-spl;
-};
-
 &main_bcdma {
        u-boot,dm-spl;
 };
@@ -141,10 +137,6 @@
        u-boot,dm-spl;
 };
 
-&cpsw3g_phy0 {
-       u-boot,dm-spl;
-};
-
 &cpsw3g_phy1 {
        u-boot,dm-spl;
 };