arm64: Layerscape: Survive LPI one-way reset workaround

The workaround of LPI one-way reset issue is broken by the series:
https://patchwork.ozlabs.org/project/uboot/list/?series=192398

This patch is to add DT node for GIC RD tables and create corresponding
reserved-memory node in kernel DT to fix it.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 5254cdf366d5d1762fa6927793a910a9ec12558e..87fb321c6355411fff40fc8a6a71f9ffb9c790f4 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -45,7 +45,22 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_GIC_V3_ITS
 int ls_gic_rd_tables_init(void *blob)
 {
-       int ret;
+       struct fdt_memory lpi_base;
+       fdt_addr_t addr;
+       fdt_size_t size;
+       int offset, ret;
+
+       offset = fdt_path_offset(gd->fdt_blob, "/syscon@0x80000000");
+       addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, offset, "reg",
+                                                 0, &size, false);
+
+       lpi_base.start = addr;
+       lpi_base.end = addr + size - 1;
+       ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL);
+       if (ret) {
+               debug("%s: failed to add reserved memory\n", __func__);
+               return ret;
+       }
 
        ret = gic_lpi_tables_init();
        if (ret)

diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 9911690e5cf70769e2e9d17c8ba25d975d20fd38..bf6373d5ec5b7a0fd63a586b547407eab08944f5 100644 (file)
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -44,6 +44,12 @@
                                         IRQ_TYPE_LEVEL_LOW)>;
        };
 
+       gic_lpi_base: syscon@0x80000000 {
+               compatible = "gic-lpi-base";
+               reg = <0x0 0x80000000 0x0 0x100000>;
+               max-gic-redistributors = <2>;
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |

diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index bf303c6ad38b46f91fb9459cbe93285b4dcfafe2..6653794d1c3905221b7a1d389ff1ceb7b95f4b41 100644 (file)
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -26,6 +26,12 @@
                interrupts = <1 9 0x4>;
        };
 
+       gic_lpi_base: syscon@0x80000000 {
+               compatible = "gic-lpi-base";
+               reg = <0x0 0x80000000 0x0 0x100000>;
+               max-gic-redistributors = <8>;
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */

diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 90a0a3f8fbe76f29f3928ac73408ce7bb4288f00..6b7bf8eb16936bfa042df9f5af7a70207f77c7fd 100644 (file)
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -26,6 +26,12 @@
                interrupts = <1 9 0x4>;
        };
 
+       gic_lpi_base: syscon@0x80000000 {
+               compatible = "gic-lpi-base";
+               reg = <0x0 0x80000000 0x0 0x100000>;
+               max-gic-redistributors = <8>;
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */

diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index dee1e2f215b9efd1c669b34142791130b12a589d..37a4f39c8f4a50888cb8b1aea64bde85d42a31aa 100644 (file)
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -43,6 +43,12 @@
                interrupts = <1 9 0x4>;
        };
 
+       gic_lpi_base: syscon@0x80000000 {
+               compatible = "gic-lpi-base";
+               reg = <0x0 0x80000000 0x0 0x200000>;
+               max-gic-redistributors = <16>;
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */