]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
sunxi: remove CONFIG_SATAPWR
authorAndre Przywara <andre.przywara@arm.com>
Fri, 15 Jul 2022 15:52:14 +0000 (16:52 +0100)
committerAndre Przywara <andre.przywara@arm.com>
Sun, 22 Oct 2023 22:40:47 +0000 (23:40 +0100)
The CONFIG_SATAPWR Kconfig symbol was used to point to a GPIO that
enables the power for a SATA harddisk.
In the DT this is described with the target-supply property in the AHCI
DT node, pointing to a (GPIO controlled) regulator. Since we need SATA
only in U-Boot proper, and use a DM driver for AHCI there, we should use
the DT instead of hardcoding this.

Add code to the sunxi AHCI driver to check the DT for that regulator and
enable it, at probe time. Then drop the current code from board.c, which
was doing that job before.
This allows us to remove the SATAPWR Kconfig definition and the
respective values from the defconfigs.
We also select the generic fixed regulator driver, which handles those
GPIO controlled regulators.

Please note that the OrangePi Plus is a bit special here, it's a H3
board without native SATA, but with a USB-to-SATA bridge. The DT models
the SATA power via a VBUS supply regulator, which we don't parse yet in
the USB PHY driver. Use the hardcoded CONFIG_USB3_VBUS_PIN for that
board meanwhile.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
22 files changed:
arch/arm/Kconfig
arch/arm/mach-sunxi/Kconfig
board/sunxi/board.c
configs/A10-OLinuXino-Lime_defconfig
configs/A20-OLinuXino-Lime2-eMMC_defconfig
configs/A20-OLinuXino-Lime2_defconfig
configs/A20-OLinuXino-Lime_defconfig
configs/A20-OLinuXino_MICRO-eMMC_defconfig
configs/A20-OLinuXino_MICRO_defconfig
configs/A20-Olimex-SOM-EVB_defconfig
configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
configs/A20-Olimex-SOM204-EVB_defconfig
configs/Cubieboard2_defconfig
configs/Cubieboard_defconfig
configs/Cubietruck_defconfig
configs/Itead_Ibox_A20_defconfig
configs/Lamobo_R1_defconfig
configs/Linksprite_pcDuino3_Nano_defconfig
configs/Linksprite_pcDuino3_defconfig
configs/Sinovoip_BPI_M3_defconfig
configs/orangepi_plus_defconfig
drivers/ata/ahci_sunxi.c

index 531b081de996ad7d3db7b8a505f148884f0fea97..dcccbfea42abcd8ecb2cc1883dfcf55999953b64 100644 (file)
@@ -1159,6 +1159,8 @@ config ARCH_SUNXI
        imply CMD_GPT
        imply CMD_UBI if MTD_RAW_NAND
        imply DISTRO_DEFAULTS
+       imply DM_REGULATOR
+       imply DM_REGULATOR_FIXED
        imply FAT_WRITE
        imply FIT
        imply OF_LIBFDT_OVERLAY
index 9d5df2c10273d15c01ec4992040677a166ed4797..1b24dfe4dd1c54f85eb32accb717ddc6eba45f30 100644 (file)
@@ -1008,14 +1008,6 @@ config VIDEO_LCD_TL059WV5C0
 
 endchoice
 
-config SATAPWR
-       string "SATA power pin"
-       default ""
-       help
-         Set the pins used to power the SATA. This takes a string in the
-         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
-         port H.
-
 config GMAC_TX_DELAY
        int "GMAC Transmit Clock Delay Chain"
        default 0
index ebaa943198464857ed342c0ae5d380018819764b..50a60e760d4121feaa2f4c943a6d38e672cab2eb 100644 (file)
@@ -187,7 +187,7 @@ enum env_location env_get_location(enum env_operation op, int prio)
 /* add board specific code here */
 int board_init(void)
 {
-       __maybe_unused int id_pfr1, ret, satapwr_pin, macpwr_pin;
+       __maybe_unused int id_pfr1, ret, macpwr_pin;
 
        gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
 
@@ -225,20 +225,6 @@ int board_init(void)
                return ret;
 
        /* strcmp() would look better, but doesn't get optimised away. */
-       if (CONFIG_SATAPWR[0]) {
-               satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR);
-               if (satapwr_pin >= 0) {
-                       gpio_request(satapwr_pin, "satapwr");
-                       gpio_direction_output(satapwr_pin, 1);
-
-                       /*
-                        * Give the attached SATA device time to power-up
-                        * to avoid link timeouts
-                        */
-                       mdelay(500);
-               }
-       }
-
        if (CONFIG_MACPWR[0]) {
                macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR);
                if (macpwr_pin >= 0) {
index df4fdfaba418c5b24b180d50107dd56ac5e0301c..57e91d0f017ced9f935440e780023df5fd89b7ba 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=480
 CONFIG_DRAM_EMR1=4
 CONFIG_SYS_CLK_FREQ=912000000
 CONFIG_I2C1_ENABLE=y
-CONFIG_SATAPWR="PC3"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index be49e9323a1adc199f6013e865c4ad48f9d99b33..44770ffb048fe1d4ecff523bec23816971ecf8c8 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB0_VBUS_PIN="PC17"
 CONFIG_USB0_VBUS_DET="PH5"
 CONFIG_I2C1_ENABLE=y
-CONFIG_SATAPWR="PC3"
 CONFIG_SPL_SPI_SUNXI=y
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index 43cd28c3dd09e4223de9bf04d2b2662fa275ae55..e10660c933c21261008cd4fa6a2051c2e2c41dc6 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
 CONFIG_USB0_VBUS_PIN="PC17"
 CONFIG_USB0_VBUS_DET="PH5"
 CONFIG_I2C1_ENABLE=y
-CONFIG_SATAPWR="PC3"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 7c77f38fba647fedbcaaa1f5d309bc281f3ef72d..4ed666a034afef6e56f2db7f1772516f01e5b81c 100644 (file)
@@ -5,7 +5,6 @@ CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=384
 CONFIG_I2C1_ENABLE=y
-CONFIG_SATAPWR="PC3"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 02116995a3ef172e13678b1bacf3e7c3688482e5..ca5869f43d9fff5cf2e685cb886beb12106d6a9e 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_I2C1_ENABLE=y
 CONFIG_VIDEO_VGA=y
-CONFIG_SATAPWR="PB8"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 895e8dbcbd2ccd840f2d4b4f789786b61b7602e0..db4270f9b270404b3947b225d7986de4fbfc0cd3 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
 CONFIG_MMC_SUNXI_SLOT_EXTRA=3
 CONFIG_I2C1_ENABLE=y
 CONFIG_VIDEO_VGA=y
-CONFIG_SATAPWR="PB8"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 5bcc9f9f3c081def2e377967754523c218a3fad0..ac900477d1eec9b54c36b3467b5ee154e202fa4c 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
 CONFIG_MMC_SUNXI_SLOT_EXTRA=3
 CONFIG_USB0_VBUS_PIN="PB9"
 CONFIG_USB0_VBUS_DET="PH5"
-CONFIG_SATAPWR="PC3"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index e5881090dda837aa6bdc3e7d5ebe8875b19ccb63..00a98140b37ebbd5ae4cd1f835ebf12411afdd68 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB0_VBUS_PIN="PC17"
 CONFIG_USB0_VBUS_DET="PH5"
 CONFIG_I2C1_ENABLE=y
-CONFIG_SATAPWR="PC3"
 CONFIG_GMAC_TX_DELAY=4
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index 592a79a6c7e2adafcb91a6ba19351b40a07a902a..f4ae3ae6d8bc4d245e39455aed37507456b0f8a6 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
 CONFIG_USB0_VBUS_PIN="PC17"
 CONFIG_USB0_VBUS_DET="PH5"
 CONFIG_I2C1_ENABLE=y
-CONFIG_SATAPWR="PC3"
 CONFIG_GMAC_TX_DELAY=4
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index 0c233687413e8352b8234a4ef1f8b8a776935355..ef4f11b7c6252b7dcf3274a9c021806c31100b02 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=480
-CONFIG_SATAPWR="PB8"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 71743f7b8a10042b20627a35af4f4192945943a4..ab3f65ad66704ae6c23397f1dfb0e0a7f96fd0a9 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
 CONFIG_SPL=y
 CONFIG_MACH_SUN4I=y
 CONFIG_DRAM_CLK=480
-CONFIG_SATAPWR="PB8"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 184f305b19d0cfcbe720166234274e7d76d811a5..184143d70869d5982189a2065654494d2e6aee34 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_USB0_VBUS_PIN="PH17"
 CONFIG_USB0_VBUS_DET="PH22"
 CONFIG_USB0_ID_DET="PH19"
 CONFIG_VIDEO_VGA=y
-CONFIG_SATAPWR="PH12"
 CONFIG_GMAC_TX_DELAY=1
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index 5d05f3379824df4194b7336d3ec2f5b3c6a98ee6..d03fa62196be9204bbde2c255df3731d90e5b5ec 100644 (file)
@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox"
 CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=480
-CONFIG_SATAPWR="PB8"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 5294608459b7bf9c0b428496dd5b6db37db0cb8d..9639cb6aad9784320fc04ad05771d472bb6a1b15 100644 (file)
@@ -5,7 +5,6 @@ CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=432
 CONFIG_MACPWR="PH23"
-CONFIG_SATAPWR="PB3"
 CONFIG_GMAC_TX_DELAY=4
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index e3e30a49490a59c5da6dc51cd68a9663e3bdad3a..9eb9a918aeeb13d76f59ded4007308212602c6e3 100644 (file)
@@ -6,7 +6,6 @@ CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=408
 CONFIG_DRAM_ZQ=122
 CONFIG_USB1_VBUS_PIN="PH11"
-CONFIG_SATAPWR="PH2"
 CONFIG_GMAC_TX_DELAY=3
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
index 1fda0db4c9df4d5fd0ee228efe529fcd57e48bed..7db10e685bcd73b8d82bcf7118c616726632a40c 100644 (file)
@@ -5,7 +5,6 @@ CONFIG_SPL=y
 CONFIG_MACH_SUN7I=y
 CONFIG_DRAM_CLK=480
 CONFIG_DRAM_ZQ=122
-CONFIG_SATAPWR="PH2"
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
index 5642e52ec50e178cbe026240d33e32a423d5ab71..ad41dbd26a166e898cafe64c3f1cf8c8676a8d10 100644 (file)
@@ -12,7 +12,6 @@ CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
 CONFIG_USB0_ID_DET="PH11"
 CONFIG_USB1_VBUS_PIN="PD24"
 CONFIG_AXP_GPIO=y
-CONFIG_SATAPWR="PD25"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_CONSOLE_MUX=y
 CONFIG_PHY_REALTEK=y
index 76de72aa2287daab3148b75c4e4ea3b9d0a5026a..ed585881d49b16b69d822421788c573c3581809c 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=672
 CONFIG_MACPWR="PD6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB1_VBUS_PIN="PG13"
-CONFIG_SATAPWR="PG11"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
@@ -16,3 +15,4 @@ CONFIG_SUN8I_EMAC=y
 CONFIG_SY8106A_POWER=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
+CONFIG_USB3_VBUS_PIN="PG11"
index 94a3379c532fc057c29ed91e6ef67b98e42dd780..9064774e6614d7915b6ab4906ac29b823bad664f 100644 (file)
@@ -7,6 +7,7 @@
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <linux/delay.h>
+#include <power/regulator.h>
 
 #define AHCI_PHYCS0R 0x00c0
 #define AHCI_PHYCS1R 0x00c4
@@ -74,6 +75,7 @@ static int sunxi_ahci_phy_init(u8 *reg_base)
 
 static int sunxi_sata_probe(struct udevice *dev)
 {
+       struct udevice *reg_dev;
        ulong base;
        u8 *reg;
        int ret;
@@ -89,6 +91,13 @@ static int sunxi_sata_probe(struct udevice *dev)
                debug("%s: Failed to init phy (err=%d)\n", __func__, ret);
                return ret;
        }
+
+       ret = device_get_supply_regulator(dev, "target-supply", &reg_dev);
+       if (ret == 0) {
+               regulator_set_enable(reg_dev, true);
+               mdelay(500);
+       }
+
        ret = ahci_probe_scsi(dev, base);
        if (ret) {
                debug("%s: Failed to probe (err=%d)\n", __func__, ret);