spi: stm32_qspi: Remove useless struct stm32_qspi_flash

Currently, in stm32_qspi_claim_bus(), QSPI_CR and QSPI_DCR registers
are saved in stm32_ospi_flash struct on first flash memory initialization
and restored on each flash accesses.

As the logic of spi-uclass.c changed since 'commit 741280e9accd
("spi: spi-uclass: Fix spi_claim_bus() speed/mode setup logic")'
set_speed() and set_mode() callbacks are called systematically when bus
speed or bus mode need to be updated, QSPI_CR and QSPI_DCR registers are
set accordingly.

So stm32_qspi_claim_bus() can be updated by removing QSPI_CR and QSPI_DCR
save/restore code and struct stm32_ospi_flash can be removed as well.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 90c207d518451a8b579c60c42eb1dd1cf129d3c8..eb52ff73b23d7765f8607484efcfe84e3a7b2f7d 100644 (file)
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -115,15 +115,8 @@ struct stm32_qspi_regs {
 #define STM32_BUSY_TIMEOUT_US          100000
 #define STM32_ABT_TIMEOUT_US           100000
 
-struct stm32_qspi_flash {
-       u32 cr;
-       u32 dcr;
-       bool initialized;
-};
-
 struct stm32_qspi_priv {
        struct stm32_qspi_regs *regs;
-       struct stm32_qspi_flash flash[STM32_QSPI_MAX_CHIP];
        void __iomem *mm_base;
        resource_size_t mm_size;
        ulong clock_rate;
@@ -407,25 +400,11 @@ static int stm32_qspi_claim_bus(struct udevice *dev)
                return -ENODEV;
 
        if (priv->cs_used != slave_cs) {
-               struct stm32_qspi_flash *flash = &priv->flash[slave_cs];
-
                priv->cs_used = slave_cs;
 
-               if (flash->initialized) {
-                       /* Set the configuration: speed + cs */
-                       writel(flash->cr, &priv->regs->cr);
-                       writel(flash->dcr, &priv->regs->dcr);
-               } else {
-                       /* Set chip select */
-                       clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL,
-                                       priv->cs_used ? STM32_QSPI_CR_FSEL : 0);
-
-                       /* Save the configuration: speed + cs */
-                       flash->cr = readl(&priv->regs->cr);
-                       flash->dcr = readl(&priv->regs->dcr);
-
-                       flash->initialized = true;
-               }
+               /* Set chip select */
+               clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL,
+                               priv->cs_used ? STM32_QSPI_CR_FSEL : 0);
        }
 
        setbits_le32(&priv->regs->cr, STM32_QSPI_CR_EN);