]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_SPL_TARGET to Kconfig
authorTom Rini <trini@konsulko.com>
Fri, 27 May 2022 21:13:52 +0000 (17:13 -0400)
committerTom Rini <trini@konsulko.com>
Mon, 6 Jun 2022 16:09:29 +0000 (12:09 -0400)
This converts the following to Kconfig:
   CONFIG_SPL_TARGET

Signed-off-by: Tom Rini <trini@konsulko.com>
68 files changed:
README
common/spl/Kconfig
configs/P1010RDB-PA_36BIT_NAND_defconfig
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PA_NAND_defconfig
configs/P1010RDB-PA_SDCARD_defconfig
configs/P1010RDB-PA_SPIFLASH_defconfig
configs/P1010RDB-PB_36BIT_NAND_defconfig
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PB_NAND_defconfig
configs/P1010RDB-PB_SDCARD_defconfig
configs/P1010RDB-PB_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_NAND_defconfig
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1020RDB-PC_NAND_defconfig
configs/P1020RDB-PC_SDCARD_defconfig
configs/P1020RDB-PC_SPIFLASH_defconfig
configs/P1020RDB-PD_NAND_defconfig
configs/P1020RDB-PD_SDCARD_defconfig
configs/P1020RDB-PD_SPIFLASH_defconfig
configs/P2020RDB-PC_36BIT_NAND_defconfig
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P2020RDB-PC_NAND_defconfig
configs/P2020RDB-PC_SDCARD_defconfig
configs/P2020RDB-PC_SPIFLASH_defconfig
configs/k2e_evm_defconfig
configs/k2g_evm_defconfig
configs/k2hk_evm_defconfig
configs/k2l_evm_defconfig
configs/ls1046ardb_qspi_spl_defconfig
configs/ls1088aqds_sdcard_ifc_defconfig
configs/ls1088aqds_sdcard_qspi_defconfig
configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
configs/ls1088ardb_sdcard_qspi_defconfig
configs/ls2080aqds_nand_defconfig
configs/ls2080aqds_sdcard_defconfig
configs/ls2080ardb_nand_defconfig
configs/m53menlo_defconfig
configs/socfpga_agilex_atf_defconfig
configs/socfpga_agilex_defconfig
configs/socfpga_agilex_vab_defconfig
configs/socfpga_n5x_atf_defconfig
configs/socfpga_n5x_defconfig
configs/socfpga_n5x_vab_defconfig
configs/socfpga_stratix10_atf_defconfig
configs/socfpga_stratix10_defconfig
configs/stm32mp15_dhcom_basic_defconfig
configs/stm32mp15_dhcor_basic_defconfig
configs/uniphier_ld4_sld8_defconfig
configs/uniphier_v7_defconfig
include/configs/P1010RDB.h
include/configs/dh_imx6.h
include/configs/ge_b1x5v2.h
include/configs/ls1046a_common.h
include/configs/ls1088a_common.h
include/configs/ls2080a_common.h
include/configs/m53menlo.h
include/configs/p1_p2_rdb_pc.h
include/configs/rcar-gen2-common.h
include/configs/rcar-gen3-common.h
include/configs/socfpga_soc64_common.h
include/configs/stm32mp15_dh_dhsom.h
include/configs/ti_armv7_keystone2.h
include/configs/uniphier.h

diff --git a/README b/README
index 452e5955023a04dca813ca4bb64bfdd19870c921..354913f82369026e923ce2288baedff88006f459 100644 (file)
--- a/README
+++ b/README
@@ -1679,11 +1679,6 @@ The following options need to be configured:
                CONFIG_SPL_RAM_DEVICE
                Support for running image already present in ram, in SPL binary
 
-               CONFIG_SPL_TARGET
-               Final target image containing SPL and payload.  Some SPLs
-               use an arch-specific makefile fragment instead, for
-               example if more than one image needs to be produced.
-
                CONFIG_SPL_FIT_PRINT
                Printing information about a FIT image adds quite a bit of
                code to SPL. So this is normally disabled in SPL. Use this
index 027ac4274b65c5c1b3f740e3bc6d1d8c3e3fae23..dfbda1befb58461440d984ec7654cb42b473f335 100644 (file)
@@ -1583,6 +1583,15 @@ config SPL_OPENSBI_LOAD_ADDR
        help
          Load address of the OpenSBI binary.
 
+config SPL_TARGET
+       string "Addtional build targets for 'make'"
+       default "spl/u-boot-spl.srec" if RCAR_GEN2
+       default "spl/u-boot-spl.scif" if RCAR_GEN3
+       default ""
+       help
+         On some platforms we need to have 'make' run additional build target
+         rules. If required on your platform, enter it here, otherwise leave blank.
+
 config TPL
        bool
        depends on SUPPORT_TPL
index 06b4ca72b21aefec53bca38498a0c237200c6d82..6c4142c200b5da7905258426a4703f26bb7ccb2c 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_DRIVERS_MISC=y
index b116eee6c5c5a076cd9f1b50aed72d6d2e0bd6f7..324ad908bb09dd02aa7fe187acc85426f0d39704 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index df4caee9e72e78b75e9ff7dad5eeedd5a4c4ff11..2299f450a972cdc5ca1bb90c000f2e03abff3c83 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index 918a107f52833aea7277a694cbe8005bf0b5fb7e..5813c75f10a6e03ac1b3ac3c23c041bdd2e43ee5 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_DRIVERS_MISC=y
index 41988bb1f72788981e54e592a2dbe56ec15c341e..a51f9acd5861e6835152b7bd65c139ae4adc2c56 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index b4dd81ea940420bc1944f4007f28dcaf2038467c..c2b5d7762ce3e4257c250c0beabec045ea580fe2 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index b69e6cf565547534976288ea1e805e1b28aea13f..4caf43dade2aa84004905eafab0917bc7ac5d9e1 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_DRIVERS_MISC=y
index 21e4e7f0f5f8f46fdbc75c47ee40785e1c615b79..50053876f8ec95f04151cd3c102fbeec2e1a0a77 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index dbbc25d319df73e7e02a89a376d864c0179d783a..6f0cd359abbf9e5b6691933d9b32b8bc8ddfa68a 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index c4e9d5900547a309a2ca7eb7604af868da6119f8..16b52196aeb815f9afc195514ddd49f6cef4120f 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_DRIVERS_MISC=y
index c0ea6b9635a9e7bd2511720776ef081b1e1e1212..6d3be4303a288e31ff50de05f8252c59dfb45367 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index c32ccc292b417d0f03c1bd5ffa138a97fc58ec32..a54f7eab5f2064a4417445d1cefbf78a7af20014 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index 3e5c0449fd8abbda10d270eb780bcb1d55c10cd0..80bfe31d79a5672615d183575b9f2b4e3c5fdcb2 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index ddd041c09a5e7538978144007fc200d3683a236f..2619ef0fb17fe0f79d1ae8bbcaad9f620b7d94c6 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 9da02480e5e2f95cd508d0fcf9ac3b33aa2ed33c..e37c74bd1f16263681a45218d0fe914e6359b461 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 6a75d6f1e8131496962f5d2cfdf92691f1ef9bf8..860636292d2fc49b1e2e5505a3bc42da4afa0235 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index 4122d1d741ee991f25140b0821f75bbb9087b014..c0d78c9f486d336f6320b8edd655ac10438f1c88 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index cfd42e4bf3ebc2d0c77ddb3f1616c3ffc06861d2..debd83ed93eddb4cd39c1711f97c12fbe609b673 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index bd3d7a3cbb05352fe3083e833199ea897aff2a72..d770fc7ba7ee2394c2fcf97574f7f835b5c37bbc 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index 43391a99b1d24c01377dd53286b37019684c9c73..db484c0d1892cdbcfe99e18cecfbaa526342813a 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 091518592c188b74a2230bf341a120ae7d1b54e5..d9d6307612394021280c6adb2e639dc5132ce77d 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index c0f6b6d8db4c658d222cdb6e328831a991c98c2d..ac4d4579bb72fcc513fcfe52ea2375d1bf236aa7 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index b17346fea34d2bf85898caf40abf06fc79fc90fd..b2a5a72143d3d20b4a0b81e08ee9581e7817a4e0 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 041179e07d36eb02a5c59bef50d7dd2cbf69c3f8..42e31b4e22ce481a35f9536477abbc1c8dd2aa24 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index f3fa869c927f5991d19433a984621b045427a72d..69ca044e5a22c2f69e18eaca92a5276b0b956707 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index ae4b758776ca75b2e56fbff0856beddbf7409bed..621e5b035f2c6d9d02695917a973fa6f163b0481 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 338bbecbb4b744f928e3c525db62236ab324d6cb..04b10d36c52a67f549e14d5d444f3d01ce45263e 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 9423b453c05a927436992dc61553f2395b632b00..58c8c13b15a4243c8aad31ef1fb416659af1d08c 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SPL_TARGET="u-boot-spi.gph"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
index 10150f5d64261cc064b27531bd1b9f23fa145ff3..b96d1fc7c1a2bf0c7295f3115cb5b66e6bfb665e 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_NAND_BASE=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SPL_TARGET="u-boot-spi.gph"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
index 2a2fb1d071772b5e9de9a0ec30520af4ba862ef1..cfe5978e550b56177281f43ca7a6da3eef43ff2a 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SPL_TARGET="u-boot-spi.gph"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
index 906e1042070fc54ec9d9fc84e7e57e903926b5f4..47d5bd14ac561eed30d99e673c2170d028ca1835 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SPL_TARGET="u-boot-spi.gph"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
index c081b786a122c8daa1e2dc3fd10d9e70892a4ef6..2f6b546a260012a28bb3e880f9ce0eadcd6c162a 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SYS_OS_BASE=0x40980000
 CONFIG_SPL_WATCHDOG=y
+CONFIG_SPL_TARGET="spl/u-boot-spl.pbl"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_SPL=y
index b2e8132446d03a99566958ec27c704e1ae44b282..663aacf876b9a1b8985e1f7de7a3c554ed05d281 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
index 40306d612a454c4a2d8ebf36b0e839d84b06dd2e..f3e204875efad306d309f14ea625bcd062b2ce3e 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index bc44ede08c770577198da70c84e4debd7d067d15..5b462a41c904d22c468c59d620aaf91b2b69963e 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index ad0e583188ba18597c370277963c2529dab703bb..455fce3ed79377e0ae453b0430b94d17cf27c521 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index 209202dc75db4ba52b709478676cbfca8d04ec4c..dab9a7fb85a91b695564ceac0416f568c6ede831 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index 0f40fa60f1897910e5c33a803eb534718fd9f6df..3d6aa69d5f187cdfccca1f9a75afd2f5c548f0d3 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index f36cf47cff21e6bc220efab139469f7b423b7b7c..9fcc5d6647d1d855ff7b80b05fe9a963bfe231f3 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_IMLS=y
index 455f19617acab245f503f210c16dde8136d51525..2ccea8315c710716276123fc44528042e1457de4 100644 (file)
@@ -37,6 +37,7 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_SPL_STACK=0x70004000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-nand-spl.imx"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_MAXARGS=32
 CONFIG_SYS_CBSIZE=1024
index ebe90ce2a5b52e166d39e83fe5a995d7271e9e44..e20789a6b463068000b6e18276e986905ab2ae63 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
 CONFIG_SYS_MAXARGS=64
index ab85359463153cf1f27aa69a2b32c445719c9994..7ae2b164a02d784db8b5291e9151d8b43ca50318 100644 (file)
@@ -37,6 +37,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
 CONFIG_SPL_CACHE=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
 CONFIG_SYS_MAXARGS=64
index fa4beddb2dc504cc168b0ca242b9a12f68680e55..539548bfcbb949c65a6ebe9db2174e9cff4e45d9 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
 CONFIG_SYS_MAXARGS=64
index dd0ad36b4b6a11309110d4dc96bb4b486029938d..77d868a74ae53f85270723eafb5e4a9ac5cf9b49 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
 CONFIG_SYS_MAXARGS=64
index f0d41d1e8f5af56234c206daa1399235ef0c1f6a..92d6045c6a7fd391f40d77fa291ad6547e4b3ad1 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
 CONFIG_SPL_CACHE=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
 CONFIG_SYS_MAXARGS=64
index f7a827f770cd0959db8a8e1728b8b70f6617b770..d3a9042ef222d7de7320151e48752e56be85f9ca 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
 CONFIG_SYS_MAXARGS=64
index 39ec1b2b11443990724d4eca9bdc44198d5fe2a1..e4d8a2e049a5a71d4e5885b135511facd9f39bd4 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
 CONFIG_SYS_MAXARGS=64
index fac82b88c3f75f83b22ab6c0b6e992254570ff02..6aff07d778416b8d976314984d70be8f6a31fa22 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000
 CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
 CONFIG_SYS_MAXARGS=64
index 38f16437aa347863dd4f1b52007454ef876de654..72d2f6e9a7c6f0083510566f9569191f91a6a245 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_SPL_SPI_FLASH_MTD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
+CONFIG_SPL_TARGET="u-boot.itb"
 CONFIG_SYS_PROMPT="STM32MP> "
 CONFIG_SYS_PBSIZE=1050
 # CONFIG_CMD_ELF is not set
index 869afdf6c80744cfa74ac5b0c2d40471b60e6d55..b16ad4fca2a5b647286639f03bc43c3ad76893e6 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_SPL_SPI_FLASH_MTD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
+CONFIG_SPL_TARGET="u-boot.itb"
 CONFIG_SYS_PROMPT="STM32MP> "
 CONFIG_SYS_PBSIZE=1050
 # CONFIG_CMD_ELF is not set
index ceb50835f53c127635234d49ef69edcf90e9adc9..72306ab25eb879e8d3babc5e946320528d6b0c86 100644 (file)
@@ -25,6 +25,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
 CONFIG_SPL_STACK=0x100000
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_CMD_CONFIG=y
 # CONFIG_CMD_XIMG is not set
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
index a2ea3a98d09ebd7e16a8add7389471e8599b47c2..a448d1cb4be3b0c2c0c06b9da2b63a34aa3df59b 100644 (file)
@@ -25,6 +25,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
 CONFIG_SPL_STACK=0x100000
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_CMD_CONFIG=y
 # CONFIG_CMD_XIMG is not set
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
index 19ca05342d883af2c57a0ecbb289db0c6b544c8d..ce63e640d5c6e6bc4aea3c3ff9c8c1143f5986d1 100644 (file)
@@ -16,7 +16,6 @@
 #include <asm/config_mpc85xx.h>
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (512 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x11000000)
@@ -29,7 +28,6 @@
 #define CONFIG_RAMBOOT_SPIFLASH
 #define CONFIG_RESET_VECTOR_ADDRESS    0x110bfffc
 #else
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (512 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x11000000)
@@ -40,8 +38,6 @@
 
 #ifdef CONFIG_MTD_RAW_NAND
 #ifdef CONFIG_NXP_ESBC
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    ((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x00200000 - CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
@@ -60,7 +56,6 @@
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
 #endif
-#define CONFIG_SPL_TARGET      "u-boot-with-spl.bin"
 #endif
 #endif
 
index d177b457aa4b7a8ca57aa0198ae7bf3bf4129e06..b495826301e7a33b2e22bbbb3e8bb23ea70d13ee 100644 (file)
@@ -23,7 +23,6 @@
 
 /* SPL */
 #include "imx6_spl.h"                  /* common IMX6 SPL configuration */
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.imx"
 
 /* Miscellaneous configurable options */
 
index 5a5a5d687a8a267991f1a0fb773b9c98b1812584..252ab5e7473d1e6c69a33064c8d68b66a656b320 100644 (file)
@@ -13,7 +13,6 @@
 #include "mx6_common.h"
 
 #include "imx6_spl.h"
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.imx"
 
 /* PWM */
 #define CONFIG_IMX6_PWM_PER_CLK                66000000
index c2563b11d0528b3c529e227cabcdcf8b4fc84785..8e9103562eb7cddeb802e1aa646370abb510966d 100644 (file)
@@ -61,7 +61,6 @@
 #endif
 
 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
-#define CONFIG_SPL_TARGET              "spl/u-boot-spl.pbl"
 #define CONFIG_SYS_MONITOR_LEN         0x100000
 #endif
 
index 3ef163d5eae7f093e02e01d7cfcda720aa24092d..9a29bb6ca1eae8807c7cd29d24fec66f7ea84eed 100644 (file)
@@ -144,8 +144,6 @@ unsigned long long get_qixis_addr(void);
 #endif
 
 #ifdef CONFIG_SPL
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-
 #ifdef CONFIG_NXP_ESBC
 #define CONFIG_U_BOOT_HDR_SIZE         (16 << 10)
 /*
index 3551a0ddb0455e4783fabd29168ee78fd45df674..f9eb829cda260a2e29617ce4924d5d501efc7f23 100644 (file)
@@ -137,8 +137,6 @@ unsigned long long get_qixis_addr(void);
        "mcinitcmd=fsl_mc start mc 0x580a00000" \
        " 0x580e00000 \0"
 
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x80400000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
index 433952c9d72c3263e696087fd4e24a1f886e36a6..ed44f355da81c10c9ef9d718c8087c0e693467f7 100644 (file)
 /*
  * NAND SPL
  */
-#define CONFIG_SPL_TARGET              "u-boot-with-nand-spl.imx"
 
 #define CONFIG_SYS_NAND_SIZE           (256 * 1024 * 1024)
 
index 24a88cebc028695669bec8c3065df9a58503fe68..f74ad628fee7cbd211da44ebb06d26cffe243f3d 100644 (file)
 #endif
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #elif defined(CONFIG_SPIFLASH)
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x11000000)
@@ -97,7 +95,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START   (0x11000000)
 #elif defined(CONFIG_SPL_BUILD)
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xf8f80000
 #define CONFIG_SYS_NAND_U_BOOT_START   0xf8f80000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
 #endif /* not CONFIG_TPL_BUILD */
-
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
index b4d2a5252f57bbf27263202aa57715b088df9678..2e5421169046278e1b386a44057b953296a27498 100644 (file)
 
 #include <asm/arch/rmobile.h>
 
-#ifdef CONFIG_SPL
-#define CONFIG_SPL_TARGET      "spl/u-boot-spl.srec"
-#endif
-
 #ifndef CONFIG_PINCTRL_PFC
 #define CONFIG_SH_GPIO_PFC
 #endif
index ee9fc2862e53682d5ac199e35ec10eb3f3b056da..e80e45dcbd7e44e1f8912f5a94e760e817c6f22d 100644 (file)
 
 #include <asm/arch/rmobile.h>
 
-#ifdef CONFIG_SPL
-#define CONFIG_SPL_TARGET      "spl/u-boot-spl.scif"
-#endif
-
 /* boot option */
 
 /* Generic Interrupt Controller Definitions */
index cbc18061f42872806664ad8df555fed776543e3d..b71f8bab156fe1a83b29a396619117ce54cc5f56 100644 (file)
@@ -143,6 +143,5 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
  * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
  *
  */
-#define CONFIG_SPL_TARGET              "spl/u-boot-spl-dtb.hex"
 
 #endif /* __CONFIG_SOCFPGA_SOC64_COMMON_H__ */
index bb95480eeb26de6380ddd329a3f6003e1e32b489..910d7ef107b574d1af4ab925f7e896e0b49ad9d8 100644 (file)
@@ -33,6 +33,4 @@
 
 #include <configs/stm32mp15_common.h>
 
-#define CONFIG_SPL_TARGET              "u-boot.itb"
-
 #endif
index 060969647b24b4d0b9c4756a0a5004b14240c88a..7fd79953dc12770bb875b6cfc8b899a75147167f 100644 (file)
@@ -12,7 +12,6 @@
 /* U-Boot Build Configuration */
 
 /* SoC Configuration */
-#define CONFIG_SPL_TARGET              "u-boot-spi.gph"
 
 /* Memory Configuration */
 #define CONFIG_SYS_LPAE_SDRAM_BASE     0x800000000
index 6493569888d22b1508324572a4ff3428df303274..2bb9e59b94621361b492bc42b74830c064d25090 100644 (file)
 /* subtract sizeof(struct image_header) */
 #define CONFIG_SYS_UBOOT_BASE                  (0x130000 - 0x40)
 
-#define CONFIG_SPL_TARGET                      "u-boot-with-spl.bin"
-
 #endif /* __CONFIG_UNIPHIER_H__ */