clk: renesas: Synchronize Gen2 tables with Linux 5.0

Synchronize R-Car Gen2 clock tables with Linux 5.0,
commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

diff --git a/drivers/clk/renesas/r8a7790-cpg-mssr.c b/drivers/clk/renesas/r8a7790-cpg-mssr.c
index 360c02c5fda51213e570175d5af9a9b796b1a517..b62b8753cd4e64e6f9bc0c1de19ad79e14ae3792 100644 (file)
--- a/drivers/clk/renesas/r8a7790-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7790-cpg-mssr.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * r8a7790 Clock Pulse Generator / Module Standby and Software Reset
  *
@@ -6,10 +7,6 @@
  * Based on clk-rcar-gen2.c
  *
  * Copyright (C) 2013 Ideas On Board SPRL
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
  */
 
 #include <common.h>
@@ -139,6 +136,7 @@ static const struct mssr_mod_clk r8a7790_mod_clks[] = {
        DEF_MOD("cmt1",                  329,   R8A7790_CLK_R),
        DEF_MOD("usbhs-dmac0",           330,   R8A7790_CLK_HP),
        DEF_MOD("usbhs-dmac1",           331,   R8A7790_CLK_HP),
+       DEF_MOD("rwdt",                  402,   R8A7790_CLK_R),
        DEF_MOD("irqc",                  407,   R8A7790_CLK_CP),
        DEF_MOD("intc-sys",              408,   R8A7790_CLK_ZS),
        DEF_MOD("audio-dmac1",           501,   R8A7790_CLK_HP),

diff --git a/drivers/clk/renesas/r8a7791-cpg-mssr.c b/drivers/clk/renesas/r8a7791-cpg-mssr.c
index 160877a27fa3a318001baeefc838201babcf0e00..e11c02e6e8272bb0bf48dc9a4093b4d81cb017cd 100644 (file)
--- a/drivers/clk/renesas/r8a7791-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7791-cpg-mssr.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Renesas R8A7791 CPG MSSR driver
  *
@@ -6,8 +6,11 @@
  *
  * Based on the following driver from Linux kernel:
  * r8a7791 Clock Pulse Generator / Module Standby and Software Reset
+ *
  * Copyright (C) 2015-2017 Glider bvba
+ *
  * Based on clk-rcar-gen2.c
+ *
  * Copyright (C) 2013 Ideas On Board SPRL
  */
 
@@ -54,7 +57,6 @@ static const struct cpg_core_clk r8a7791_core_clks[] = {
 
        /* Core Clock Outputs */
        DEF_BASE("z",    R8A7791_CLK_Z,    CLK_TYPE_GEN2_Z,    CLK_PLL0),
-       DEF_BASE("lb",   R8A7791_CLK_LB,   CLK_TYPE_GEN2_LB,   CLK_PLL1),
        DEF_BASE("adsp", R8A7791_CLK_ADSP, CLK_TYPE_GEN2_ADSP, CLK_PLL1),
        DEF_BASE("sdh",  R8A7791_CLK_SDH,  CLK_TYPE_GEN2_SDH,  CLK_PLL1),
        DEF_BASE("sd0",  R8A7791_CLK_SD0,  CLK_TYPE_GEN2_SD0,  CLK_PLL1),
@@ -67,6 +69,7 @@ static const struct cpg_core_clk r8a7791_core_clks[] = {
        DEF_FIXED("hp",     R8A7791_CLK_HP,    CLK_PLL1,         12, 1),
        DEF_FIXED("i",      R8A7791_CLK_I,     CLK_PLL1,          2, 1),
        DEF_FIXED("b",      R8A7791_CLK_B,     CLK_PLL1,         12, 1),
+       DEF_FIXED("lb",     R8A7791_CLK_LB,    CLK_PLL1,         24, 1),
        DEF_FIXED("p",      R8A7791_CLK_P,     CLK_PLL1,         24, 1),
        DEF_FIXED("cl",     R8A7791_CLK_CL,    CLK_PLL1,         48, 1),
        DEF_FIXED("m2",     R8A7791_CLK_M2,    CLK_PLL1,          8, 1),
@@ -125,6 +128,7 @@ static const struct mssr_mod_clk r8a7791_mod_clks[] = {
        DEF_MOD("cmt1",                  329,   R8A7791_CLK_R),
        DEF_MOD("usbhs-dmac0",           330,   R8A7791_CLK_HP),
        DEF_MOD("usbhs-dmac1",           331,   R8A7791_CLK_HP),
+       DEF_MOD("rwdt",                  402,   R8A7791_CLK_R),
        DEF_MOD("irqc",                  407,   R8A7791_CLK_CP),
        DEF_MOD("intc-sys",              408,   R8A7791_CLK_ZS),
        DEF_MOD("audio-dmac1",           501,   R8A7791_CLK_HP),

diff --git a/drivers/clk/renesas/r8a7792-cpg-mssr.c b/drivers/clk/renesas/r8a7792-cpg-mssr.c
index 46dd3c9c9161eedbb0691172d067d2bd836b0f1c..fb18ee7aedf06625d2f430c954b8821736a49c00 100644 (file)
--- a/drivers/clk/renesas/r8a7792-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7792-cpg-mssr.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * r8a7792 Clock Pulse Generator / Module Standby and Software Reset
  *
@@ -6,10 +7,6 @@
  * Based on clk-rcar-gen2.c
  *
  * Copyright (C) 2013 Ideas On Board SPRL
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
  */
 
 #include <common.h>
@@ -52,7 +49,6 @@ static const struct cpg_core_clk r8a7792_core_clks[] = {
        DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
 
        /* Core Clock Outputs */
-       DEF_BASE("lb",   R8A7792_CLK_LB,   CLK_TYPE_GEN2_LB,   CLK_PLL1),
        DEF_BASE("qspi", R8A7792_CLK_QSPI, CLK_TYPE_GEN2_QSPI, CLK_PLL1_DIV2),
 
        DEF_FIXED("z",      R8A7792_CLK_Z,     CLK_PLL0,          1, 1),
@@ -62,6 +58,7 @@ static const struct cpg_core_clk r8a7792_core_clks[] = {
        DEF_FIXED("hp",     R8A7792_CLK_HP,    CLK_PLL1,         12, 1),
        DEF_FIXED("i",      R8A7792_CLK_I,     CLK_PLL1,          3, 1),
        DEF_FIXED("b",      R8A7792_CLK_B,     CLK_PLL1,         12, 1),
+       DEF_FIXED("lb",     R8A7792_CLK_LB,    CLK_PLL1,         24, 1),
        DEF_FIXED("p",      R8A7792_CLK_P,     CLK_PLL1,         24, 1),
        DEF_FIXED("cl",     R8A7792_CLK_CL,    CLK_PLL1,         48, 1),
        DEF_FIXED("m2",     R8A7792_CLK_M2,    CLK_PLL1,          8, 1),
@@ -97,6 +94,7 @@ static const struct mssr_mod_clk r8a7792_mod_clks[] = {
        DEF_MOD("tpu0",                  304,   R8A7792_CLK_CP),
        DEF_MOD("sdhi0",                 314,   R8A7792_CLK_SD),
        DEF_MOD("cmt1",                  329,   R8A7792_CLK_R),
+       DEF_MOD("rwdt",                  402,   R8A7792_CLK_R),
        DEF_MOD("irqc",                  407,   R8A7792_CLK_CP),
        DEF_MOD("intc-sys",              408,   R8A7792_CLK_ZS),
        DEF_MOD("audio-dmac0",           502,   R8A7792_CLK_HP),

diff --git a/drivers/clk/renesas/r8a7794-cpg-mssr.c b/drivers/clk/renesas/r8a7794-cpg-mssr.c
index e8f57c3d015041438709e998d0587fbb16eef6b0..b6be1bc0323d41a04617905bf9d14305710cef1f 100644 (file)
--- a/drivers/clk/renesas/r8a7794-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7794-cpg-mssr.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * r8a7794 Clock Pulse Generator / Module Standby and Software Reset
  *
@@ -6,10 +7,6 @@
  * Based on clk-rcar-gen2.c
  *
  * Copyright (C) 2013 Ideas On Board SPRL
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
  */
 
 #include <common.h>
@@ -54,7 +51,6 @@ static const struct cpg_core_clk r8a7794_core_clks[] = {
        DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
 
        /* Core Clock Outputs */
-       DEF_BASE("lb",   R8A7794_CLK_LB,   CLK_TYPE_GEN2_LB,   CLK_PLL1),
        DEF_BASE("adsp", R8A7794_CLK_ADSP, CLK_TYPE_GEN2_ADSP, CLK_PLL1),
        DEF_BASE("sdh",  R8A7794_CLK_SDH,  CLK_TYPE_GEN2_SDH,  CLK_PLL1),
        DEF_BASE("sd0",  R8A7794_CLK_SD0,  CLK_TYPE_GEN2_SD0,  CLK_PLL1),
@@ -68,6 +64,7 @@ static const struct cpg_core_clk r8a7794_core_clks[] = {
        DEF_FIXED("hp",     R8A7794_CLK_HP,    CLK_PLL1,         12, 1),
        DEF_FIXED("i",      R8A7794_CLK_I,     CLK_PLL1,          2, 1),
        DEF_FIXED("b",      R8A7794_CLK_B,     CLK_PLL1,         12, 1),
+       DEF_FIXED("lb",     R8A7794_CLK_LB,    CLK_PLL1,         24, 1),
        DEF_FIXED("p",      R8A7794_CLK_P,     CLK_PLL1,         24, 1),
        DEF_FIXED("cl",     R8A7794_CLK_CL,    CLK_PLL1,         48, 1),
        DEF_FIXED("cp",     R8A7794_CLK_CP,    CLK_PLL1,         48, 1),
@@ -120,6 +117,7 @@ static const struct mssr_mod_clk r8a7794_mod_clks[] = {
        DEF_MOD("cmt1",                  329,   R8A7794_CLK_R),
        DEF_MOD("usbhs-dmac0",           330,   R8A7794_CLK_HP),
        DEF_MOD("usbhs-dmac1",           331,   R8A7794_CLK_HP),
+       DEF_MOD("rwdt",                  402,   R8A7794_CLK_R),
        DEF_MOD("irqc",                  407,   R8A7794_CLK_CP),
        DEF_MOD("intc-sys",              408,   R8A7794_CLK_ZS),
        DEF_MOD("audio-dmac0",           502,   R8A7794_CLK_HP),

diff --git a/include/dt-bindings/clock/r8a7790-cpg-mssr.h b/include/dt-bindings/clock/r8a7790-cpg-mssr.h
index 1625b8bf34822b6e8f41f1dbdead56c8ce13bff6..c5955b56b36d80876e7cf6cd037a3d018909f1ef 100644 (file)
--- a/include/dt-bindings/clock/r8a7790-cpg-mssr.h
+++ b/include/dt-bindings/clock/r8a7790-cpg-mssr.h
@@ -1,10 +1,6 @@
-/*
- * Copyright (C) 2015 Renesas Electronics Corp.
+/* SPDX-License-Identifier: GPL-2.0+
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * Copyright (C) 2015 Renesas Electronics Corp.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7790_CPG_MSSR_H__

diff --git a/include/dt-bindings/clock/r8a7791-cpg-mssr.h b/include/dt-bindings/clock/r8a7791-cpg-mssr.h
index e8823410c01c5a09d0676ddf547c1821b42cf619..aadd06c566c043e7e1909a3dc23fa70514022de1 100644 (file)
--- a/include/dt-bindings/clock/r8a7791-cpg-mssr.h
+++ b/include/dt-bindings/clock/r8a7791-cpg-mssr.h
@@ -1,10 +1,6 @@
-/*
- * Copyright (C) 2015 Renesas Electronics Corp.
+/* SPDX-License-Identifier: GPL-2.0+
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * Copyright (C) 2015 Renesas Electronics Corp.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__

diff --git a/include/dt-bindings/clock/r8a7792-cpg-mssr.h b/include/dt-bindings/clock/r8a7792-cpg-mssr.h
index 72ce85cb2f94b0abb206145d9332dc14a47f738c..829c44db0271c27a95b788a740bd728a733bb41b 100644 (file)
--- a/include/dt-bindings/clock/r8a7792-cpg-mssr.h
+++ b/include/dt-bindings/clock/r8a7792-cpg-mssr.h
@@ -1,10 +1,6 @@
-/*
- * Copyright (C) 2015 Renesas Electronics Corp.
+/* SPDX-License-Identifier: GPL-2.0+
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * Copyright (C) 2015 Renesas Electronics Corp.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__

diff --git a/include/dt-bindings/clock/r8a7793-clock.h b/include/dt-bindings/clock/r8a7793-clock.h
index 7318d45d4e7e9888c41aa1fb66def087b4cb6ff4..49c66d8ed1782fc06d06000f6af96c8a2b464262 100644 (file)
--- a/include/dt-bindings/clock/r8a7793-clock.h
+++ b/include/dt-bindings/clock/r8a7793-clock.h
@@ -1,16 +1,8 @@
-/*
+/* SPDX-License-Identifier: GPL-2.0
+ *
  * r8a7793 clock definition
  *
  * Copyright (C) 2014  Renesas Electronics Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7793_H__

diff --git a/include/dt-bindings/clock/r8a7793-cpg-mssr.h b/include/dt-bindings/clock/r8a7793-cpg-mssr.h
index 8809b0f62d615457f07a463a3c4699d0276a0250..d1ff646c31f2355bf0e67d28c563a827a9df94a6 100644 (file)
--- a/include/dt-bindings/clock/r8a7793-cpg-mssr.h
+++ b/include/dt-bindings/clock/r8a7793-cpg-mssr.h
@@ -1,10 +1,6 @@
-/*
- * Copyright (C) 2015 Renesas Electronics Corp.
+/* SPDX-License-Identifier: GPL-2.0+
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * Copyright (C) 2015 Renesas Electronics Corp.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__

diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h
index 93e99c3ffc8dafebef94d0644cb15532c86ab1b4..649f005782d05213ae3760124e67e4913c5b419c 100644 (file)
--- a/include/dt-bindings/clock/r8a7794-clock.h
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -1,11 +1,7 @@
-/*
+/* SPDX-License-Identifier: GPL-2.0+
+ *
  * Copyright (C) 2014 Renesas Electronics Corporation
  * Copyright 2013 Ideas On Board SPRL
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7794_H__

diff --git a/include/dt-bindings/clock/r8a7794-cpg-mssr.h b/include/dt-bindings/clock/r8a7794-cpg-mssr.h
index 9d720311ae3a229a324febbeeaf698f0ec977c5c..6314e23b51af5be9a019a89ac2791c03bf69c57a 100644 (file)
--- a/include/dt-bindings/clock/r8a7794-cpg-mssr.h
+++ b/include/dt-bindings/clock/r8a7794-cpg-mssr.h
@@ -1,10 +1,6 @@
-/*
- * Copyright (C) 2015 Renesas Electronics Corp.
+/* SPDX-License-Identifier: GPL-2.0+
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * Copyright (C) 2015 Renesas Electronics Corp.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7794_CPG_MSSR_H__