config CUSTOM_SYS_INIT_SP_ADDR
hex "Static location for the initial stack pointer"
depends on HAS_CUSTOM_SYS_INIT_SP_ADDR
- default SYS_TEXT_BASE if TFABOOT
+ default TEXT_BASE if TFABOOT
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
LDFLAGS_u-boot += --build-id=none
ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
-LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
+LDFLAGS_u-boot += -Ttext $(CONFIG_TEXT_BASE)
endif
# insure the checker run with the right endianness
quiet_cmd_objcopy_uboot = OBJCOPY $@
ifdef cmd_static_rela
-cmd_objcopy_uboot = $(cmd_objcopy) && $(call shell_cmd,static_rela,$<,$@,$(CONFIG_SYS_TEXT_BASE)) || { rm -f $@; false; }
+cmd_objcopy_uboot = $(cmd_objcopy) && $(call shell_cmd,static_rela,$<,$@,$(CONFIG_TEXT_BASE)) || { rm -f $@; false; }
else
cmd_objcopy_uboot = $(cmd_objcopy)
endif
# from the SPL U-Boot version.
#
ifndef CONFIG_SYS_UBOOT_START
-CONFIG_SYS_UBOOT_START := $(CONFIG_SYS_TEXT_BASE)
+CONFIG_SYS_UBOOT_START := $(CONFIG_TEXT_BASE)
endif
# Boards with more complex image requirements can provide an .its source file
ifdef CONFIG_SPL_LOAD_FIT
MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
+ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-p $(CONFIG_FIT_EXTERNAL_OFFSET) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(DEVICE_TREE))) \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST)))
else
MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
+ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
MKIMAGEFLAGS_u-boot-ivt.img = -A $(ARCH) -T firmware_ivt -C none -O u-boot \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
+ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
u-boot-ivt.img: MKIMAGEOUTPUT = u-boot-ivt.img.log
endif
fi)
MKIMAGEFLAGS_u-boot.kwb = -n $(KWD_CONFIG_FILE) \
- -T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
+ -T kwbimage -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE)
MKIMAGEFLAGS_u-boot-spl.kwb = -n $(KWD_CONFIG_FILE) \
- -T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
+ -T kwbimage -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE) \
$(if $(KEYDIR),-k $(KEYDIR))
MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
UBOOT_BIN := u-boot.bin
MKIMAGEFLAGS_u-boot-lzma.img = -A $(ARCH) -T standalone -C lzma -O u-boot \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
+ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
u-boot.bin.lzma: u-boot.bin FORCE
u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL $(if $(CONFIG_OF_SEPARATE),u-boot.img,u-boot.uim) FORCE
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
-MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_SYS_TEXT_BASE)
+MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_TEXT_BASE)
u-boot.ubl: u-boot-with-spl.bin FORCE
$(call if_changed,mkimage)
quiet_cmd_u-boot-elf ?= LD $@
cmd_u-boot-elf ?= $(LD) u-boot-elf.o -o $@ \
$(if $(CONFIG_SYS_BIG_ENDIAN),-EB,-EL) \
- -T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_SYS_TEXT_BASE) \
- -Ttext=$(CONFIG_SYS_TEXT_BASE)
+ -T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_TEXT_BASE) \
+ -Ttext=$(CONFIG_TEXT_BASE)
u-boot.elf: u-boot.bin u-boot-elf.lds
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
$(call if_changed,u-boot-elf)
$(call if_changed,copy)
else
MKIMAGEFLAGS_u-boot-mtk.bin = -T mtk_image \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
+ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE) \
-n "$(patsubst "%",%,$(CONFIG_MTK_BROM_HEADER_INFO))"
u-boot-mtk.bin: u-boot.bin FORCE
ENTRY(_start)
SECTIONS
{
- . = CONFIG_SYS_TEXT_BASE;
+ . = CONFIG_TEXT_BASE;
__image_copy_start = .;
. = ALIGN(1024);
__ivt_start = .;
depends on LINUX_KERNEL_IMAGE_HEADER
hex
help
- The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
+ The value subtracted from CONFIG_TEXT_BASE to calculate the
TEXT_OFFSET value written to the Linux kernel image header.
config GICV2
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
- sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
+ sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_TEXT_BASE)
b mmu_disable
.align 5
u-boot.ivt: u-boot.bin
$(call if_changed,mkalign_mxs)
- $(call if_changed,mkivt_mxs,$(CONFIG_SYS_TEXT_BASE),\
+ $(call if_changed,mkivt_mxs,$(CONFIG_TEXT_BASE),\
0x40001000,0x40001040)
spl/u-boot-spl.csf: spl/u-boot-spl.ivt spl/u-boot-spl.bin board/$(VENDOR)/$(BOARD)/sign/u-boot-spl.csf
$(call if_changed,mkcsfreq_mxs,$(CONFIG_SPL_TEXT_BASE),0x8000)
u-boot.csf: u-boot.ivt u-boot.bin board/$(VENDOR)/$(BOARD)/sign/u-boot.csf
- $(call if_changed,mkcsfreq_mxs,$(CONFIG_SYS_TEXT_BASE),0x40001000)
+ $(call if_changed,mkcsfreq_mxs,$(CONFIG_TEXT_BASE),0x40001000)
%.sig: %.csf
$(call if_changed,mkcst_mxs)
* Since second uboot binary has a head, that space need to be
* reserved either(assuming its size is less than 0x1000).
*/
- off = fdt_add_mem_rsv(blob, CONFIG_SYS_TEXT_BASE - UBOOT_HEAD_LEN,
- CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_SPL_MALLOC_SIZE +
- UBOOT_HEAD_LEN);
+ off = fdt_add_mem_rsv(blob, CONFIG_TEXT_BASE - UBOOT_HEAD_LEN,
+ CONFIG_SYS_MONITOR_LEN +
+ CONFIG_SYS_SPL_MALLOC_SIZE + UBOOT_HEAD_LEN);
if (off < 0)
printf("Failed to reserve memory for SD boot deep sleep: %s\n",
fdt_strerror(off));
(__HEAD_FLAG_PAGE_SIZE << 1) | \
(__HEAD_FLAG_PHYS_BASE << 3))
-#define TEXT_OFFSET (CONFIG_SYS_TEXT_BASE - \
+#define TEXT_OFFSET (CONFIG_TEXT_BASE - \
CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE)
/*
.globl _TEXT_BASE
_TEXT_BASE:
- .quad CONFIG_SYS_TEXT_BASE
+ .quad CONFIG_TEXT_BASE
/*
* These are defined in the linker script.
os = "u-boot";
arch = "arm";
compression = "none";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
type = "standalone";
uboot-blob {
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
type = "standalone";
uboot-blob {
type = "standalone";
arch = "arm64";
compression = "none";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";
type = "standalone";
arch = "arm64";
compression = "none";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
type = "standalone";
uboot-blob {
os = "U-Boot";
arch = "arm";
compression = "none";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};
os = "u-boot";
arch = "arm64";
compression = "none";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};
#include <config.h>
#ifdef CONFIG_SPL_TEXT_BASE
-#define U_BOOT_OFFSET (CONFIG_SYS_TEXT_BASE - CONFIG_SPL_TEXT_BASE)
+#define U_BOOT_OFFSET (CONFIG_TEXT_BASE - CONFIG_SPL_TEXT_BASE)
#else
#define U_BOOT_OFFSET 0
#endif
#define MXS_BM_SDMMC1_3V3 0x0a
#define MXS_BM_SDMMC1_1V8 0x1a
-#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_SYS_TEXT_BASE - 0x200))
+#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_TEXT_BASE - 0x200))
struct mxs_spl_data {
uint8_t boot_mode_idx;
#ifdef CONFIG_SPL_BUILD
.word CONFIG_SPL_TEXT_BASE
#else
- .word CONFIG_SYS_TEXT_BASE
+ .word CONFIG_TEXT_BASE
#endif
.word fel_stash - .
#else
adr r0, _main
ldr r1, _start_ofs
add r0, r1
- ldr r1, =CONFIG_SYS_TEXT_BASE
+ ldr r1, =CONFIG_TEXT_BASE
sub r1, r0
add lr, r1
#endif
* correctly apply relocations, we need to know the linked value.
*
* Linked &__image_copy_start, which we know was at
- * CONFIG_SYS_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
+ * CONFIG_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
* relocated value, since it isn't a symbol reference.
*/
ldr x1, _TEXT_BASE /* x1 <- Linked &__image_copy_start */
if ARCH_APPLE
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x00000000
config SYS_CONFIG_NAME
default 0x4000
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
- default SYS_TEXT_BASE
+ default TEXT_BASE
endif
config SYS_SOC
default "aspeed"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x00000000
choice
_MTEXT_BASE:
#undef START_FROM_MEM
#ifdef START_FROM_MEM
- .word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
+ .word CONFIG_TEXT_BASE-PHYS_FLASH_1
#else
- .word CONFIG_SYS_TEXT_BASE
+ .word CONFIG_TEXT_BASE
#endif
.globl lowlevel_init
POS1:
adr r5, POS1 /* r5 = POS1 run time */
ldr r0, =POS1 /* r0 = POS1 compile */
- sub r5, r5, r0 /* r0 = CONFIG_SYS_TEXT_BASE-1 */
+ sub r5, r5, r0 /* r0 = CONFIG_TEXT_BASE-1 */
/* memory control configuration 1 */
ldr r0, =SMRDATA
#ifdef CONFIG_SPI_BOOTING
case BOOT_MODE_SERIAL:
/* Customised function to copy u-boot from SF */
- exynos_spi_copy(param->uboot_size, CONFIG_SYS_TEXT_BASE);
+ exynos_spi_copy(param->uboot_size, CONFIG_TEXT_BASE);
break;
#endif
case BOOT_MODE_SD:
copy_bl2_from_emmc = get_irom_func(EMMC44_INDEX);
end_bootop_from_emmc = get_irom_func(EMMC44_END_INDEX);
- copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
+ copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_TEXT_BASE);
end_bootop_from_emmc();
break;
#endif
*/
is_cr_z_set = config_branch_prediction(0);
usb_copy = get_irom_func(USB_INDEX);
- usb_copy(0, (u32 *)CONFIG_SYS_TEXT_BASE);
+ usb_copy(0, (u32 *)CONFIG_TEXT_BASE);
config_branch_prediction(is_cr_z_set);
break;
#endif
}
if (copy_bl2)
- copy_bl2(offset, size, CONFIG_SYS_TEXT_BASE);
+ copy_bl2(offset, size, CONFIG_TEXT_BASE);
}
void memzero(void *s, size_t n)
copy_uboot_to_ram();
/* Jump to U-Boot image */
- uboot = (void *)CONFIG_SYS_TEXT_BASE;
+ uboot = (void *)CONFIG_TEXT_BASE;
(*uboot)();
/* Never returns Here */
}
endif
MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
- -T $(IMAGE_TYPE) -e $(CONFIG_SYS_TEXT_BASE)
+ -T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
u-boot.imx: MKIMAGEOUTPUT = u-boot.imx.log
u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE
ifeq ($(CONFIG_MULTI_DTB_FIT),y)
MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
- -T $(IMAGE_TYPE) -e $(CONFIG_SYS_TEXT_BASE)
+ -T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log
u-boot-dtb.imx: u-boot-fit-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE
endif
else ifeq ($(CONFIG_OF_SEPARATE),y)
MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
- -T $(IMAGE_TYPE) -e $(CONFIG_SYS_TEXT_BASE)
+ -T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log
u-boot-dtb.imx: u-boot-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE
SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout $(PLUGIN).bin FORCE
$(call if_changed,mkimage)
-MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \
- -e $(CONFIG_SYS_TEXT_BASE) -C none -T firmware
+MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_TEXT_BASE) \
+ -e $(CONFIG_TEXT_BASE) -C none -T firmware
u-boot.uim: u-boot.bin FORCE
$(call if_changed,mkimage)
/* Find the memory region runs the U-Boot */
if (start >= phys_sdram_1_start && start <= end1 &&
- (start <= CONFIG_SYS_TEXT_BASE &&
- end >= CONFIG_SYS_TEXT_BASE)) {
+ (start <= CONFIG_TEXT_BASE &&
+ end >= CONFIG_TEXT_BASE)) {
if ((end + 1) <=
((sc_faddr_t)phys_sdram_1_start +
phys_sdram_1_size))
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x87800000
config SPL_TEXT_BASE
if (bl_len < 512)
bl_len = 512;
- return (void *)((CONFIG_SYS_TEXT_BASE - fit_size - bl_len -
+ return (void *)((CONFIG_TEXT_BASE - fit_size - bl_len -
align_len) & ~align_len);
}
#endif
config SYS_MALLOC_F_LEN
default 0x2000
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x87300000
config NR_DRAM_BANKS
$(call if_changed,mkfitimage)
MKIMAGEFLAGS_u-boot.img_HS = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
+ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb_HS,$(subst ",,$(CONFIG_OF_LIST)))
struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
{
if (sysfw_loaded)
- return (struct legacy_img_hdr *)(CONFIG_SYS_TEXT_BASE + offset);
+ return (struct legacy_img_hdr *)(CONFIG_TEXT_BASE + offset);
else if (sysfw_load_address)
return sysfw_load_address;
else
ifndef CONFIG_SPL_BUILD
MKIMAGEFLAGS_MLO = -A $(ARCH) -T gpimage -C none \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -n U-Boot
+ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE) -n U-Boot
MLO: u-boot.bin FORCE
$(call if_changed,mkimage)
@dd if=/dev/zero bs=8 count=1 2>/dev/null >> $@
* The NSIH (first 512 Bytes of u-boot.bin) is necessary for the
* 2nd-Bootloader to get information like load address of U-Boot.
*
- * 0x400 must be added to CONFIG_SYS_TEXT_BASE to have the actual load and
+ * 0x400 must be added to CONFIG_TEXT_BASE to have the actual load and
* start address because 2nd-Bootloader loads with an offset of 0x400
* (NSIH + 0x200 bytes are not loaded into RAM).
*
.word (_end - _start) + 20 * 1024 /* 0x50: load size
* (bin + 20k for DTB) */
.space 0x4
- .word CONFIG_SYS_TEXT_BASE + 0x400 /* 0x58: load address */
+ .word CONFIG_TEXT_BASE + 0x400 /* 0x58: load address */
.word 0x00000000
- .word CONFIG_SYS_TEXT_BASE + 0x400 /* 0x60: start address */
+ .word CONFIG_TEXT_BASE + 0x400 /* 0x60: start address */
.space 0x198
.byte 'N' /* 0x1FC: "NSIH" signature */
.byte 'S'
config SYS_ARCH
default "arm"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x8000
choice
void mem_map_fill(void)
{
int banks = OTX_MEM_MAP_USED;
- u32 dram_start = CONFIG_SYS_TEXT_BASE;
+ u32 dram_start = CONFIG_TEXT_BASE;
if (otx_is_soc(CN83XX)) {
otx_mem_map[banks].virt = 0x8c0000000000UL;
void mem_map_fill(void)
{
int banks = OTX2_MEM_MAP_USED;
- u32 dram_start = CONFIG_SYS_TEXT_BASE;
+ u32 dram_start = CONFIG_TEXT_BASE;
for (int i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
otx2_mem_map[banks].virt = dram_start;
$(if $(KBUILD_VERBOSE:1=), >/dev/null)
else
cmd_mkomapsecimg = $(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh \
- $(patsubst u-boot_HS_%,%,$(@F)) $< $@ $(CONFIG_SYS_TEXT_BASE) \
+ $(patsubst u-boot_HS_%,%,$(@F)) $< $@ $(CONFIG_TEXT_BASE) \
$(if $(KBUILD_VERBOSE:1=), >/dev/null)
endif
else
ifdef CONFIG_SPL_LOAD_FIT
MKIMAGEFLAGS_u-boot_HS.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
+ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb_HS,$(subst ",,$(CONFIG_OF_LIST)))
endchoice
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x11000000
config SYS_CONFIG_NAME
is built by binman. U-Boot sits near the start of the image.
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
- default SYS_TEXT_BASE
+ default TEXT_BASE
source "arch/arm/mach-rockchip/px30/Kconfig"
source "arch/arm/mach-rockchip/rk3036/Kconfig"
default 0x2000 if TARGET_SOCFPGA_ARRIA10
default 0x2000 if TARGET_SOCFPGA_GEN5
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x01000040 if TARGET_SOCFPGA_ARRIA10
default 0x01000040 if TARGET_SOCFPGA_GEN5
endchoice
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xC0000000
config PRE_CON_BUF_ADDR
This config enables implementation of driver-model pmic and
regulator uclass features for access to STM32MP15x PWR in SPL.
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xC0100000
config PRE_CON_BUF_ADDR
static bool sunxi_valid_emmc_boot(struct mmc *mmc)
{
struct blk_desc *bd = mmc_get_blk_desc(mmc);
- uint32_t *buffer = (void *)(uintptr_t)CONFIG_SYS_TEXT_BASE;
+ u32 *buffer = (void *)(uintptr_t)CONFIG_TEXT_BASE;
struct boot_file_head *egon_head = (void *)buffer;
int bootpart = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
uint32_t spl_size, emmc_checksum, chksum = 0;
struct legacy_img_hdr *header;
uint32_t load_offset = sunxi_get_spl_size();
- header = (struct legacy_img_hdr *)CONFIG_SYS_TEXT_BASE;
+ header = (struct legacy_img_hdr *)CONFIG_TEXT_BASE;
load_offset = max_t(uint32_t, load_offset, CONFIG_SYS_SPI_U_BOOT_OFFS);
spi0_init();
TEE_LOAD_ADDR_HIGH=`printf 0x%x $((TEE_LOAD_ADDR >> 32))`
if [ -z "$BL33_LOAD_ADDR" ];then
- BL33_LOAD_ADDR=`awk '/CONFIG_SYS_TEXT_BASE/ { print $3 }' include/generated/autoconf.h`
+ BL33_LOAD_ADDR=`awk '/CONFIG_TEXT_BASE/ { print $3 }' include/generated/autoconf.h`
fi
BL33_LOAD_ADDR_LOW=`printf 0x%x $((BL33_LOAD_ADDR & 0xffffffff))`
BL33_LOAD_ADDR_HIGH=`printf 0x%x $((BL33_LOAD_ADDR >> 32))`
*/
_vectors:
.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
-#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
-.long _start - CONFIG_SYS_TEXT_BASE
+#if defined(CONFIG_M5282) && (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+.long _start - CONFIG_TEXT_BASE
#else
.long _START
#endif
#if defined(CONFIG_SYS_INT_FLASH_BASE) && \
(defined(CONFIG_M5282) || defined(CONFIG_M5281))
-#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+#if (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
.long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
.long 0xFFFFFFFF /* all sectors protected */
.long 0x00000000 /* supervisor/User restriction */
movec %d0, %RAMBAR1
#if defined(CONFIG_M5282)
-#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+#if (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
/*
* Setup code in SRAM to initialize FLASHBAR,
* if start from internal Flash
/* Setup code to initialize FLASHBAR, if start from external Memory */
move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
movec %d0, %FLASHBAR
-#endif /* (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
+#endif /* (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
#endif
#endif
* therefore no VBR to set
*/
#if !defined(CONFIG_MONITOR_IS_IN_RAM)
-#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+#if defined(CONFIG_M5282) && (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
move.l #CONFIG_SYS_INT_FLASH_BASE, %d0
#else
move.l #CONFIG_SYS_FLASH_BASE, %d0
/* Flash offset is 0 until we setup CS0 */
.long 0x00000000
#if defined(CONFIG_M5307) && \
- (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
-.long _start - CONFIG_SYS_TEXT_BASE
+ (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+.long _start - CONFIG_TEXT_BASE
#else
.long _START
#endif
rte;
#if defined(CONFIG_SERIAL_BOOT)
-#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
+#define ASM_DRAMINIT (asm_dram_init - CONFIG_TEXT_BASE + \
CONFIG_SYS_INIT_RAM_ADDR)
-#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_SYS_TEXT_BASE)
-#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
+#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_TEXT_BASE)
+#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_TEXT_BASE + \
CONFIG_SYS_INIT_RAM_ADDR)
#endif
asm_sbf_img_hdr:
.long 0x00000000 /* checksum, not yet implemented */
.long 0x00040000 /* image length */
- .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
+ .long CONFIG_TEXT_BASE /* image to be relocated at */
asm_dram_init:
move.w #0x2700,%sr /* Mask off Interrupt */
jsr asm_dspi_rd_status
/* jump to memory and execute */
- move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
+ move.l #(CONFIG_TEXT_BASE + 0x400), %a0
jmp (%a0)
asm_dspi_wr_status:
/* copy 4 boot pages to dram as soon as possible */
/* each page is 996 bytes (1056 total with 60 ECC bytes */
move.l #0x00000000, %a1 /* src */
- move.l #CONFIG_SYS_TEXT_BASE, %a2 /* dst */
+ move.l #CONFIG_TEXT_BASE, %a2 /* dst */
move.l #0x3E0, %d0 /* sz in long */
asm_boot_nand_copy:
move.l #4, %d2 /* start at 4 */
move.l #0xFC0FFF04, %a0 /* cmd2 */
move.l #0xFC0FFF0C, %a1 /* rar */
- move.l #(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
+ move.l #(CONFIG_TEXT_BASE + 0xF80), %a2
asm_nand_read:
move.l #0x11000000, %d0 /* rar */
bgt asm_nand_read
/* jump to memory and execute */
- move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
+ move.l #(CONFIG_TEXT_BASE + 0x400), %a0
jmp (%a0)
#endif /* CONFIG_SYS_NAND_BOOT */
* @rela_start: rela section start
* @rela_end: rela section end
* @dyn_start: dynamic section start
- * @origin_addr: address where u-boot starts(doesn't need to be CONFIG_SYS_TEXT_BASE)
+ * @origin_addr: address where u-boot starts(doesn't need to be CONFIG_TEXT_BASE)
*/
void mb_fix_rela(u32 reloc_addr, u32 verbose, u32 rela_start,
u32 rela_end, u32 dyn_start, u32 origin_addr)
/*
* Return in case u-boot.elf is used directly.
* Skip it when u-boot.bin is loaded to different address than
- * CONFIG_SYS_TEXT_BASE. In this case relocation is necessary to run.
+ * CONFIG_TEXT_BASE. In this case relocation is necessary to run.
*/
- if (reloc_addr == CONFIG_SYS_TEXT_BASE) {
+ if (reloc_addr == CONFIG_TEXT_BASE) {
debug_cond(verbose,
"Relocation address is the same - skip relocation\n");
return;
add r6, r0, r0
lwi r7, r20, ALIGNMENT_ADDR
- addi r7, r7, -CONFIG_SYS_TEXT_BASE
+ addi r7, r7, -CONFIG_TEXT_BASE
add r7, r7, r5
lwi r8, r20, ALIGNMENT_ADDR + 0x4
- addi r8, r8, -CONFIG_SYS_TEXT_BASE
+ addi r8, r8, -CONFIG_TEXT_BASE
add r8, r8, r5
lwi r9, r20, ALIGNMENT_ADDR + 0x8
- addi r9, r9, -CONFIG_SYS_TEXT_BASE
+ addi r9, r9, -CONFIG_TEXT_BASE
add r9, r9, r5
- addi r10, r0, CONFIG_SYS_TEXT_BASE
+ addi r10, r0, CONFIG_TEXT_BASE
brlid r15, mb_fix_rela
nop
if (ret)
hang();
- header = (struct legacy_img_hdr *)(CONFIG_SYS_TEXT_BASE -
+ header = (struct legacy_img_hdr *)(CONFIG_TEXT_BASE -
sizeof(struct legacy_img_hdr));
count = blk_dread(mmc_get_blk_desc(mmc),
hang();
image_entry_noargs_t image_entry =
- (image_entry_noargs_t)CONFIG_SYS_TEXT_BASE;
+ (image_entry_noargs_t)CONFIG_TEXT_BASE;
image_entry();
/* Modify ra/s0 such we return to physical NOR location */
li t0, 0x0fffffff
- li t1, CONFIG_SYS_TEXT_BASE
+ li t1, CONFIG_TEXT_BASE
and s0, ra, t0
add s0, s0, t1
config SYS_SCACHE_LINE_SIZE
default 32 if SOC_MT7621
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x9c000000 if !SPL && !SOC_MT7621
default 0x80200000 if SPL || SOC_MT7621
_mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(15);
_mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_IPROT |
MAS1_TSIZE(BOOKE_PAGESZ_4M);
- _mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, MAS2_I|MAS2_G);
+ _mas2 = FSL_BOOKE_MAS2(CONFIG_TEXT_BASE, MAS2_I | MAS2_G);
_mas3 = FSL_BOOKE_MAS3(flash_phys, 0, MAS3_SW|MAS3_SR|MAS3_SX);
_mas7 = FSL_BOOKE_MAS7(flash_phys);
MAS0_ESEL(CONFIG_SYS_PPC_E500_DEBUG_TLB);
_mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_IPROT |
MAS1_TSIZE(BOOKE_PAGESZ_4M);
- _mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, MAS2_I|MAS2_G);
+ _mas2 = FSL_BOOKE_MAS2(CONFIG_TEXT_BASE, MAS2_I | MAS2_G);
_mas3 = FSL_BOOKE_MAS3(flash_phys, 0, MAS3_SW|MAS3_SR|MAS3_SX);
_mas7 = FSL_BOOKE_MAS7(flash_phys);
{
/* Optional boot sector */
#if defined(CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR) && !defined(CONFIG_SPL)
- .bootsect CONFIG_SYS_TEXT_BASE - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512 : {
+ .bootsect CONFIG_TEXT_BASE - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512 : {
KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootsect))
. = CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512;
}
binman {
filename = "u-boot.bin";
- skip-at-start = <CONFIG_SYS_TEXT_BASE>;
+ skip-at-start = <CONFIG_TEXT_BASE>;
sort-by-offset;
pad-byte = <0xff>;
size = <CONFIG_SYS_MONITOR_LEN>;
u-boot-with-ucode-ptr {
- offset = <CONFIG_SYS_TEXT_BASE>;
+ offset = <CONFIG_TEXT_BASE>;
optional-ucode;
};
/ {
binman {
filename = "u-boot.bin";
- skip-at-start = <CONFIG_SYS_TEXT_BASE>;
+ skip-at-start = <CONFIG_TEXT_BASE>;
sort-by-offset;
pad-byte = <0xff>;
size = <CONFIG_SYS_MONITOR_LEN>;
u-boot-with-ucode-ptr {
- offset = <CONFIG_SYS_TEXT_BASE>;
+ offset = <CONFIG_TEXT_BASE>;
optional-ucode;
};
os = "U-Boot";
arch = "riscv";
compression = "none";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";
SECTIONS
{
- . = CONFIG_SYS_TEXT_BASE;
+ . = CONFIG_TEXT_BASE;
reloc_dst = .;
PROVIDE (_ftext = .);
config X86_OFFSET_U_BOOT
hex "Offset of U-Boot in ROM image"
- depends on HAVE_SYS_TEXT_BASE
- default SYS_TEXT_BASE
+ depends on HAVE_TEXT_BASE
+ default TEXT_BASE
config X86_OFFSET_SPL
hex "Offset of SPL in ROM image"
spl_image->size = CONFIG_SYS_MONITOR_LEN; /* We don't know SPL size */
spl_image->entry_point = spl_phase() == PHASE_TPL ?
- CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
+ CONFIG_SPL_TEXT_BASE : CONFIG_TEXT_BASE;
spl_image->load_addr = spl_image->entry_point;
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";
/* variable range MTRR#0: ROM area */
mask = ~(CONFIG_SYS_MONITOR_LEN - 1);
- base = CONFIG_SYS_TEXT_BASE & mask;
+ base = CONFIG_TEXT_BASE & mask;
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ROM),
base | MTRR_TYPE_WRBACK);
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_ROM),
/* checksum */
.long -0x1BADB002 - (1 << 16)
/* header addr */
- .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
+ .long multiboot_header - _x86boot_start + CONFIG_TEXT_BASE
/* load addr */
- .long CONFIG_SYS_TEXT_BASE
+ .long CONFIG_TEXT_BASE
/* load end addr */
.long 0
/* bss end addr */
.long 0
/* entry addr */
- .long CONFIG_SYS_TEXT_BASE
+ .long CONFIG_TEXT_BASE
#ifdef CONFIG_X86_LOAD_FROM_32_BIT
/*
/DISCARD/ : { *(__u_boot_list_2_cmd_*) }
#endif
-#ifdef CONFIG_SYS_TEXT_BASE
- . = CONFIG_SYS_TEXT_BASE; /* Location of bootcode in flash */
+#ifdef CONFIG_TEXT_BASE
+ . = CONFIG_TEXT_BASE; /* Location of bootcode in flash */
#endif
__text_start = .;
/DISCARD/ : { *(__u_boot_list_2_cmd_*) }
#endif
- . = CONFIG_SYS_TEXT_BASE; /* Location of bootcode in flash */
+ . = CONFIG_TEXT_BASE; /* Location of bootcode in flash */
__text_start = .;
.text.start : { *(.text.start); }
if (re_src == re_end)
panic("No relocation data");
-#ifdef CONFIG_SYS_TEXT_BASE
- text_base = CONFIG_SYS_TEXT_BASE;
+#ifdef CONFIG_TEXT_BASE
+ text_base = CONFIG_TEXT_BASE;
#else
- panic("No CONFIG_SYS_TEXT_BASE");
+ panic("No CONFIG_TEXT_BASE");
#endif
#if CONFIG_IS_ENABLED(X86_64)
do_elf_reloc_fixups64(text_base, size, re_src, re_end);
* TODO(sjg@chromium.org): We use this area of RAM for the stack
* and global_data in SPL. Once U-Boot starts up and releocates it
* is not needed. We could make this a CONFIG option or perhaps
- * place it immediately below CONFIG_SYS_TEXT_BASE.
+ * place it immediately below CONFIG_TEXT_BASE.
*/
__maybe_unused char *ptr = (char *)0x110000;
#else
struct spl_boot_device *bootdev)
{
spl_image->size = CONFIG_SYS_MONITOR_LEN;
- spl_image->entry_point = CONFIG_SYS_TEXT_BASE;
- spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
+ spl_image->entry_point = CONFIG_TEXT_BASE;
+ spl_image->load_addr = CONFIG_TEXT_BASE;
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";
int checkboard (void)
{
puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
-#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+#if (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
puts(" Boot from Internal FLASH\n");
#endif
return 0;
config SYS_CONFIG_NAME
default "som-db5800-som-6867"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy
device tree blob to configure U-Boot.
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
- default SYS_TEXT_BASE
+ default TEXT_BASE
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x88000000 if TARGET_VEXPRESS64_BASE_FVP
default 0xe0000000 if TARGET_VEXPRESS64_JUNO
default 0x00001000 if TARGET_VEXPRESS64_BASER_FVP
int board_init(void)
{
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
+ gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
return 0;
}
/*
* On this SoC, U-Boot is running as an ELF file. Change the
- * relocation address to CONFIG_SYS_TEXT_BASE, so that in
+ * relocation address to CONFIG_TEXT_BASE, so that in
* setup_reloc, gd->reloc_off works out to 0, effectively
* disabling relocation. Otherwise U-Boot hangs in the setup
* instructions just before relocate_code in
* arch/arm/lib/crt0.S.
*/
- gd->relocaddr = CONFIG_SYS_TEXT_BASE;
+ gd->relocaddr = CONFIG_TEXT_BASE;
return 0;
}
=> u-boot as single bootloader starting from flash
- in board/cobra5272/config.mk CONFIG_SYS_TEXT_BASE should be
+ in board/cobra5272/config.mk CONFIG_TEXT_BASE should be
- CONFIG_SYS_TEXT_BASE = 0xffe00000
+ CONFIG_TEXT_BASE = 0xffe00000
=> linking address for u-boot as single bootloader stored in flash
=> u-boot as RAM version, chainloaded by another bootloader or using bdm cable
- in board/cobra5272/config.mk CONFIG_SYS_TEXT_BASE should be
+ in board/cobra5272/config.mk CONFIG_TEXT_BASE should be
- CONFIG_SYS_TEXT_BASE = 0x00020000
+ CONFIG_TEXT_BASE = 0x00020000
=> target linking address for RAM
char *end_of_uboot;
char command[256];
- end_of_uboot = (char *)(ulong)(CONFIG_SYS_TEXT_BASE + _end_ofs
+ end_of_uboot = (char *)(ulong)(CONFIG_TEXT_BASE + _end_ofs
+ fdt_totalsize(gd->fdt_blob));
end_of_uboot += 9;
default "conga-qeval20-qa3-e3845" if TARGET_CONGA_QEVAL20_QA3_E3845
default "theadorable-x86-conga-qa3-e3845" if TARGET_THEADORABLE_X86_CONGA_QA3_E3845
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_SOC
default "coreboot"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x01110000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "MCR3000"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x04000000
endif
u-boot.bin is directy flashed, but CONFIT_DA850_LOWLEVEL must be set
to initialize hardware that's normally done by SPL.
-For this case, CONFIG_SYS_TEXT_BASE=0x60000000 which is the address to
+For this case, CONFIG_TEXT_BASE=0x60000000 which is the address to
which the bootloader jumps when powered on.
Example:
default "dfi-bt700" if TARGET_Q7X_151_DFI_BT700
default "theadorable-x86-dfi-bt700" if TARGET_THEADORABLE_X86_DFI_BT700
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "efi-x86_payload"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x00200000
config BOARD_SPECIFIC_OPTIONS # dummy
if TARGET_QEMU_ARM_32BIT || TARGET_QEMU_ARM_64BIT
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x00000000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "qemu-riscv"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x81200000 if SPL
default 0x80000000 if !RISCV_SMODE
default 0x80200000 if RISCV_SMODE && ARCH_RV64I
config SYS_CONFIG_NAME
default "qemu-x86"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000 if !SUPPORT_SPL
default 0x01110000 if SUPPORT_SPL
SOC_TYPE IMX8QM
CONTAINER
IMAGE A35 bl31.bin 0x80000000
-IMAGE A35 u-boot.bin CONFIG_SYS_TEXT_BASE
+IMAGE A35 u-boot.bin CONFIG_TEXT_BASE
SOC_TYPE IMX8QX
CONTAINER
IMAGE A35 bl31.bin 0x80000000
-IMAGE A35 u-boot.bin CONFIG_SYS_TEXT_BASE
+IMAGE A35 u-boot.bin CONFIG_TEXT_BASE
* in last boot.
*/
if (is_warm_boot()) {
- second_uboot = (void (*)(void))CONFIG_SYS_TEXT_BASE;
+ second_uboot = (void (*)(void))CONFIG_TEXT_BASE;
second_uboot();
}
* in last boot.
*/
if (is_warm_boot()) {
- second_uboot = (void (*)(void))CONFIG_SYS_TEXT_BASE;
+ second_uboot = (void (*)(void))CONFIG_TEXT_BASE;
second_uboot();
}
config EMMC_BOOT
bool "Support for booting from EMMC"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x96000000 if SD_BOOT || EMMC_BOOT
default 0x82000000 if TFABOOT
default 0x20100000
config EMMC_BOOT
bool "Support for booting from EMMC"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x96000000 if SD_BOOT || EMMC_BOOT
default 0x82000000 if TFABOOT
default 0x20100000
config SYS_CONFIG_NAME
default "chromebook_coral"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xffe00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "chromebook_link"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000 if !SUPPORT_SPL
default 0x10000000 if SUPPORT_SPL
default "chromebook_samus" if TARGET_CHROMEBOOK_SAMUS
default "chromebook_samus" if TARGET_CHROMEBOOK_SAMUS_TPL
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xffe00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "chromebox_panther"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000
# Panther actually uses haswell, not ivybridge, so this is just a placeholder
u32 i;
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
+ gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
/* Configure the HSUSB block */
mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
config SYS_CONFIG_NAME
default "gxp"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x50000000
config SYS_CONFIG_NAME
default "boston"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x9fc00000 if 32BIT
default 0xffffffff9fc00000 if 64BIT
config SYS_CONFIG_NAME
default "ci20"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x80000000
endif
config SYS_CONFIG_NAME
default "malta"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xbe000000 if 32BIT
default 0xffffffffbe000000 if 64BIT
config SYS_CONFIG_NAME
default "imgtec_xilfpga"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x80C00000
endif
config SYS_CONFIG_NAME
default "bayleybay"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "cherryhill"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xffe00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "cougarcanyon2"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xffe00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "crownbay"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_MALLOC_LEN
default 0x08000000
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x01101000
config ROM_TABLE_ADDR
config SYS_CONFIG_NAME
default "galileo"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff10000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "minnowmax"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy
config SYS_CONFIG_NAME
default "slimbootloader"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x00100000
config BOARD_SPECIFIC_OPTIONS
}
}
printf("Check update: starting factory image @%08x ...\n",
- CONFIG_SYS_TEXT_BASE);
+ CONFIG_TEXT_BASE);
} else if (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)) {
/*
* When running in field updated u-boot, make sure that
*/
WARN_ON(bootcount > CONFIG_BOOTCOUNT_BOOTLIMIT);
printf("Check update: updated u-boot starting @%08x ...\n",
- CONFIG_SYS_TEXT_BASE);
+ CONFIG_TEXT_BASE);
}
}
#endif
config SYS_CONFIG_NAME
default "kontron_sl28"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x96000000
config SL28_SPL_LOADS_ATF_BL31
config SYS_CONFIG_NAME
default "microchip_mpfs_icicle"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x80000000 if !RISCV_SMODE
default 0x80200000 if RISCV_SMODE
config SYS_CONFIG_NAME
default "pic32mzdask"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x9d004000
endif
#include <config.h>
kernoffs: /* offset of kernel image from this address */
- .word . - CONFIG_SYS_TEXT_BASE - KERNEL_OFFSET
+ .word . - CONFIG_TEXT_BASE - KERNEL_OFFSET
kernaddr: /* address of kernel after copying */
.word KERNEL_ADDRESS
*
* Nokia X-Loader is loading secondary image to address 0x80400000.
* NOLO is loading boot image to random place, so it doesn't really
- * matter what is set in CONFIG_SYS_TEXT_BASE. We have to detect
+ * matter what is set in CONFIG_TEXT_BASE. We have to detect
* KERNEL_OFFSET from the current execution address and copy it to
* absolute address KERNEL_ADDRESS.
*
* Note that U-Boot has to be compiled with CONFIG_POSITION_INDEPENDENT
* because it is loaded at random address and not to the fixed address
- * (CONFIG_SYS_TEXT_BASE).
+ * (CONFIG_TEXT_BASE).
*/
/* r0 - start of kernel before */
config SYS_CONFIG_NAME
default "openpiton-riscv64"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x81000000 if SPL
default 0x80000000 if !RISCV_SMODE
default 0x81000000 if RISCV_SMODE
config SYS_CONFIG_NAME
default "ap121"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x9f000000
config SYS_DCACHE_SIZE
config SYS_CONFIG_NAME
default "ap143"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x9f000000
config SYS_DCACHE_SIZE
config SYS_CONFIG_NAME
default "ap152"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x9f000000
endif
_arm64_header:
b _start
.word 0
- .quad CONFIG_SYS_TEXT_BASE-PHYS_SDRAM_1 /* Image load offset, LE */
+ .quad CONFIG_TEXT_BASE-PHYS_SDRAM_1 /* Image load offset, LE */
.quad 0 /* Effective size of kernel image, little-endian */
.quad 0 /* kernel flags, little-endian */
.quad 0 /* reserved */
int board_init(void)
{
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
+ gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
init_gic_v3();
SOC_TYPE IMX8QX
CONTAINER
IMAGE A35 bl31.bin 0x80000000
-IMAGE A35 u-boot.bin CONFIG_SYS_TEXT_BASE
+IMAGE A35 u-boot.bin CONFIG_TEXT_BASE
config SYS_CONFIG_NAME
default "sifive-unleashed"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x80200000 if SPL
default 0x80000000 if !RISCV_SMODE
default 0x80200000 if RISCV_SMODE
config SYS_CONFIG_NAME
default "sifive-unmatched"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x80200000 if SPL
default 0x80000000 if !RISCV_SMODE
default 0x80200000 if RISCV_SMODE
int board_init(void)
{
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
+ gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
return 0;
}
config SYS_CONFIG_NAME
default "sipeed-maix"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x80000000
config DEFAULT_DEVICE_TREE
void *fw_dtb;
*err = 0;
- fw_dtb = (void *)(CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
+ fw_dtb = (void *)(CONFIG_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
if (fdt_magic(fw_dtb) != FDT_MAGIC) {
printf("DTB is not passed via %x\n", (u32)fw_dtb);
*err = -ENXIO;
arc_id = 0x53
# initial header values: place where preloader will store u-boot binary,
- # should be equal to CONFIG_SYS_TEXT_BASE
+ # should be equal to CONFIG_TEXT_BASE
image_copy_adr = 0x81000000
# initial constant header values, do not change these values
uboot_scrypt_file = "u-boot-update.txt"
# initial header values: place where preloader will store u-boot binary,
- # should be equal to CONFIG_SYS_TEXT_BASE
+ # should be equal to CONFIG_TEXT_BASE
image_copy_adr = 0x81000000
# initial constant header values, do not change these values
struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
{
- return (struct legacy_img_hdr *)(CONFIG_SYS_TEXT_BASE);
+ return (struct legacy_img_hdr *)(CONFIG_TEXT_BASE);
}
int board_init(void)
config SYS_CONFIG_NAME
default "tplink_wdr4300"
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0xa1000000
config SYS_DCACHE_SIZE
endchoice
-config SYS_TEXT_BASE
+config TEXT_BASE
default 0x2fc00000 if TQMA6S
default 0x4fc00000 if TQMA6Q || TQMA6DL
incorrect when used with device tree as this option does not
exist / should not be used.
-config HAVE_SYS_TEXT_BASE
+config HAVE_TEXT_BASE
bool
depends on !NIOS2 && !XTENSA
depends on !EFI_APP
default y
-config SYS_TEXT_BASE
- depends on HAVE_SYS_TEXT_BASE
+config TEXT_BASE
+ depends on HAVE_TEXT_BASE
default 0x0 if POSITION_INDEPENDENT
default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
default 0x81700000 if MACH_SUNIV
config SYS_MONITOR_BASE
depends on HAVE_SYS_MONITOR_BASE
hex "Physical start address of boot monitor code"
- default SYS_TEXT_BASE
+ default TEXT_BASE
help
The physical start address of boot monitor code (which is the same as
- CONFIG_SYS_TEXT_BASE when linking) and the same as CONFIG_SYS_FLASH_BASE
+ CONFIG_TEXT_BASE when linking) and the same as CONFIG_SYS_FLASH_BASE
when booting from flash.
config SPL_SYS_MONITOR_BASE
return 1;
}
- from = map_sysmem(CONFIG_SYS_TEXT_BASE, 0);
+ from = map_sysmem(CONFIG_TEXT_BASE, 0);
memcpy(buf, from, len);
ret = spi_flash_test(flash, buf, len, offset, vbuf);
free(vbuf);
static void process_fdt_options(const void *blob)
{
-#ifdef CONFIG_SYS_TEXT_BASE
+#ifdef CONFIG_TEXT_BASE
ulong addr;
/* Add an env variable to point to a kernel payload, if available */
addr = ofnode_conf_read_int("kernel-offset", 0);
if (addr)
- env_set_addr("kernaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
+ env_set_addr("kernaddr", (void *)(CONFIG_TEXT_BASE + addr));
/* Add an env variable to point to a root disk, if available */
addr = ofnode_conf_read_int("rootdisk-offset", 0);
if (addr)
- env_set_addr("rootaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
-#endif /* CONFIG_SYS_TEXT_BASE */
+ env_set_addr("rootaddr", (void *)(CONFIG_TEXT_BASE + addr));
+#endif /* CONFIG_TEXT_BASE */
}
const char *bootdelay_process(void)
bss_start = (ulong)&__bss_start;
bss_end = (ulong)&__bss_end;
-#ifdef CONFIG_SYS_TEXT_BASE
- text_base = CONFIG_SYS_TEXT_BASE;
+#ifdef CONFIG_TEXT_BASE
+ text_base = CONFIG_TEXT_BASE;
#else
text_base = CONFIG_SYS_MONITOR_BASE;
#endif
static int setup_reloc(void)
{
if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
-#ifdef CONFIG_SYS_TEXT_BASE
+#ifdef CONFIG_TEXT_BASE
#ifdef ARM
gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
#elif defined(CONFIG_MICROBLAZE)
* On all ColdFire arch cpu, monitor code starts always
* just after the default vector table location, so at 0x400
*/
- gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
+ gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
#elif !defined(CONFIG_SANDBOX)
- gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
+ gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
#endif
#endif
}
#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
/* flash mapped at end of memory map */
- bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
+ bd->bi_flashoffset = CONFIG_TEXT_BASE + flash_size;
#elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
#endif
DECLARE_BINMAN_MAGIC_SYM;
#ifndef CONFIG_SYS_UBOOT_START
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
#endif
#ifndef CONFIG_SYS_MONITOR_LEN
/* Unknown U-Boot size, let's assume it will not be more than 200 KB */
return CONFIG_VPL_TEXT_BASE;
#endif
return spl_next_phase() == PHASE_SPL ? CONFIG_SPL_TEXT_BASE :
- CONFIG_SYS_TEXT_BASE;
+ CONFIG_TEXT_BASE;
}
/*
__weak struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
{
- return map_sysmem(CONFIG_SYS_TEXT_BASE + offset, 0);
+ return map_sysmem(CONFIG_TEXT_BASE + offset, 0);
}
void spl_set_header_raw_uboot(struct spl_image_info *spl_image)
spl_image->load_addr = u_boot_pos;
} else {
spl_image->entry_point = CONFIG_SYS_UBOOT_START;
- spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
+ spl_image->load_addr = CONFIG_TEXT_BASE;
}
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";
void spl_invoke_atf(struct spl_image_info *spl_image)
{
uintptr_t bl32_entry = 0;
- uintptr_t bl33_entry = CONFIG_SYS_TEXT_BASE;
+ uintptr_t bl33_entry = CONFIG_TEXT_BASE;
void *blob = spl_image->fdt_addr;
uintptr_t platform_param = (uintptr_t)blob;
int node;
*/
nand_spl_load_image(CONFIG_CMD_SPL_NAND_OFS,
CONFIG_CMD_SPL_WRITE_SIZE,
- (void *)CONFIG_SYS_TEXT_BASE);
+ (void *)CONFIG_TEXT_BASE);
/* copy to destintion */
for (dst = (int *)CONFIG_SYS_SPL_ARGS_ADDR,
- src = (int *)CONFIG_SYS_TEXT_BASE;
- src < (int *)(CONFIG_SYS_TEXT_BASE +
+ src = (int *)CONFIG_TEXT_BASE;
+ src < (int *)(CONFIG_TEXT_BASE +
CONFIG_CMD_SPL_WRITE_SIZE);
src++, dst++) {
writel(readl(src), dst);
#include <asm/assembler.h>
ENTRY(spl_optee_entry)
- ldr lr, =CONFIG_SYS_TEXT_BASE
+ ldr lr, =CONFIG_TEXT_BASE
mov pc, r3
ENDPROC(spl_optee_entry)
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x0
+CONFIG_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFC00000
+CONFIG_TEXT_BASE=0xFFC00000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFF800000
+CONFIG_TEXT_BASE=0xFF800000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x0
+CONFIG_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x8000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x0
+CONFIG_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x0
+CONFIG_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x0
+CONFIG_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_TEXT_BASE=0x4000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="mcr3000"
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xFE000000
+CONFIG_TEXT_BASE=0xFE000000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_PPC=y
CONFIG_SYS_IMMR=0xE0000000
-CONFIG_SYS_TEXT_BASE=0xFFF80000
+CONFIG_TEXT_BASE=0xFFF80000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
CONFIG_SYS_IMMR=0xE0000000
-CONFIG_SYS_TEXT_BASE=0xFFF80000
+CONFIG_TEXT_BASE=0xFFF80000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
CONFIG_SYS_IMMR=0xE0000000
-CONFIG_SYS_TEXT_BASE=0xFFF80000
+CONFIG_TEXT_BASE=0xFFF80000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x11000000
+CONFIG_TEXT_BASE=0x11000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xFFF40000
+CONFIG_TEXT_BASE=0xFFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xFFF40000
+CONFIG_TEXT_BASE=0xFFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xCF400
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xFFF40000
+CONFIG_TEXT_BASE=0xFFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFKW/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00600000
+CONFIG_TEXT_BASE=0x00600000
CONFIG_TARGET_SBx81LIFKW=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00600000
+CONFIG_TEXT_BASE=0x00600000
CONFIG_TARGET_SBx81LIFXCAT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x30000000
+CONFIG_TEXT_BASE=0x30000000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x30000000
+CONFIG_TEXT_BASE=0x30000000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x30000000
+CONFIG_TEXT_BASE=0x30000000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x30000000
+CONFIG_TEXT_BASE=0x30000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x30000000
+CONFIG_TEXT_BASE=0x30000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x30000000
+CONFIG_TEXT_BASE=0x30000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
CONFIG_MPC85xx=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xFFF40000
+CONFIG_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
CONFIG_ENV_ADDR=0xFFE20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x40001000
+CONFIG_TEXT_BASE=0x40001000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS7=y
CONFIG_TARGET_A3Y17LTE=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x40001000
+CONFIG_TEXT_BASE=0x40001000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS7=y
CONFIG_TARGET_A5Y17LTE=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x40001000
+CONFIG_TEXT_BASE=0x40001000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS7=y
CONFIG_TARGET_A7Y17LTE=y
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x01200000
+CONFIG_TEXT_BASE=0x01200000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x01200000
+CONFIG_TEXT_BASE=0x01200000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x80000000
+CONFIG_TEXT_BASE=0x80000000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x01200000
+CONFIG_TEXT_BASE=0x01200000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x01200000
+CONFIG_TEXT_BASE=0x01200000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x80000000
+CONFIG_TEXT_BASE=0x80000000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARCH_CPU_INIT=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x30000000
+CONFIG_TEXT_BASE=0x30000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x110000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFC00000
+CONFIG_TEXT_BASE=0xFFC00000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ENV_SIZE=0x1000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x9F000000
+CONFIG_TEXT_BASE=0x9F000000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x40000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x9F000000
+CONFIG_TEXT_BASE=0x9F000000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ENV_SIZE=0x10000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x9F000000
+CONFIG_TEXT_BASE=0x9F000000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x13000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0xD0000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x13000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0xD0000
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43E00000
+CONFIG_TEXT_BASE=0x43E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS5=y
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_SECT_SIZE=0x8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x0000000
+CONFIG_TEXT_BASE=0x0000000
CONFIG_SYS_MALLOC_LEN=0x50000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x50000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x23000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x73f00000
+CONFIG_TEXT_BASE=0x73f00000
CONFIG_SYS_MALLOC_LEN=0x2c000
CONFIG_TARGET_AT91SAM9M10G45EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x73f00000
+CONFIG_TEXT_BASE=0x73f00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9M10G45EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x3000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x2c000
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21f00000
+CONFIG_TEXT_BASE=0x21f00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_ATMEL_LEGACY=y
CONFIG_ARM=y
CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_DM_GPIO=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21000000
+CONFIG_TEXT_BASE=0x21000000
CONFIG_SYS_MALLOC_LEN=0x460000
CONFIG_TARGET_TAURUS=y
CONFIG_AT91_GPIO_PULLUP=y
CONFIG_ARC=y
CONFIG_TARGET_AXS101=y
-CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_TEXT_BASE=0x81000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_DM_GPIO=y
CONFIG_ARC=y
CONFIG_ISA_ARCV2=y
-CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_TEXT_BASE=0x81000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x6FF000
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_BCMSTB=y
-CONFIG_SYS_TEXT_BASE=0x10100000
+CONFIG_TEXT_BASE=0x10100000
CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_BCM7260=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_BCMSTB=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_BCM7445=y
CONFIG_ARM=y
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM47622=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM4908=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM4912=y
CONFIG_ARM=y
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM63138=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM63146=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM63148=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM63158=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM63178=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM6756=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM6813=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM6846=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM6855=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM6856=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM6858=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=50000000
CONFIG_ARCH_BCMBCA=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_BCM6878=y
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_BCMNS3=y
-CONFIG_SYS_TEXT_BASE=0xFF000000
+CONFIG_TEXT_BASE=0xFF000000
CONFIG_SYS_MALLOC_LEN=0xc00000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_SYS_BOARD="beelink-s922x"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_BOARD="beelink-s922x"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_BOARD="beelink-s922x"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_TEXT_BASE=0x4000000
CONFIG_ENV_OFFSET=0x300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
-CONFIG_SYS_TEXT_BASE=0x3f401000
+CONFIG_TEXT_BASE=0x3f401000
CONFIG_SYS_MALLOC_LEN=0x402000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=1
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x9FC00000
+CONFIG_TEXT_BASE=0x9FC00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x9FC00000
+CONFIG_TEXT_BASE=0x9FC00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x9FC00000
+CONFIG_TEXT_BASE=0x9FC00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x9FC00000
+CONFIG_TEXT_BASE=0x9FC00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xFFFFFFFF9FC00000
+CONFIG_TEXT_BASE=0xFFFFFFFF9FC00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xFFFFFFFF9FC00000
+CONFIG_TEXT_BASE=0xFFFFFFFF9FC00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xFFFFFFFF9FC00000
+CONFIG_TEXT_BASE=0xFFFFFFFF9FC00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xFFFFFFFF9FC00000
+CONFIG_TEXT_BASE=0xFFFFFFFF9FC00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
# CONFIG_SPL_SYS_THUMB_BUILD is not set
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2400000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x5F0000
CONFIG_SYS_ARCH_TIMER=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_TEXT_BASE=0x00100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0x1110000
+CONFIG_TEXT_BASE=0x1110000
CONFIG_SYS_MALLOC_F_LEN=0x3d00
CONFIG_NR_DRAM_BANKS=8
CONFIG_MAX_CPUS=8
CONFIG_SYS_ARCH_TIMER=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_TEXT_BASE=0x00100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFEF0000
+CONFIG_TEXT_BASE=0xFFEF0000
CONFIG_SYS_MALLOC_F_LEN=0x2400
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_SYS_ARCH_TIMER=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_TEXT_BASE=0x00100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_SYS_MALLOC_F_LEN=0x1d00
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xffed0000
+CONFIG_TEXT_BASE=0xffed0000
CONFIG_SYS_MALLOC_F_LEN=0x1a00
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_SYS_ARCH_TIMER=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_TEXT_BASE=0x00100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_MVEBU_ARMADA_8K=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
-CONFIG_SYS_TEXT_BASE=0x3f401000
+CONFIG_TEXT_BASE=0x3f401000
CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x6EF000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x6EF000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0x1120000
+CONFIG_TEXT_BASE=0x1120000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="coreboot"
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0x1110000
+CONFIG_TEXT_BASE=0x1110000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="coreboot"
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_CORSTONE1000=y
-CONFIG_SYS_TEXT_BASE=0x80000000
+CONFIG_TEXT_BASE=0x80000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="corstone1000-mps3"
CONFIG_COUNTER_FREQUENCY=25000000
# CONFIG_SYS_ARCH_TIMER is not set
CONFIG_TARGET_PRESIDIO_ASIC=y
-CONFIG_SYS_TEXT_BASE=0x04000000
+CONFIG_TEXT_BASE=0x04000000
CONFIG_SYS_MALLOC_LEN=0x820000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_COUNTER_FREQUENCY=25000000
# CONFIG_SYS_ARCH_TIMER is not set
CONFIG_TARGET_PRESIDIO_ASIC=y
-CONFIG_SYS_TEXT_BASE=0x04000000
+CONFIG_TEXT_BASE=0x04000000
CONFIG_SYS_MALLOC_LEN=0x820000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_COUNTER_FREQUENCY=25000000
# CONFIG_SYS_ARCH_TIMER is not set
CONFIG_TARGET_PRESIDIO_ASIC=y
-CONFIG_SYS_TEXT_BASE=0x04000000
+CONFIG_TEXT_BASE=0x04000000
CONFIG_SYS_MALLOC_LEN=0x820000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x72000000
+CONFIG_TEXT_BASE=0x72000000
CONFIG_SYS_MALLOC_LEN=0x460000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_TARGET_CORVUS=y
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_TEXT_BASE=0xFFE00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x5FF000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x0
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_TARGET_CRS3XX_98DX3236=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x1F0000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_TARGET_CRS3XX_98DX3236=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x1F0000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_TARGET_CRS3XX_98DX3236=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x1F0000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_TARGET_CRS3XX_98DX3236=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x1F0000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_TARGET_CRS3XX_98DX3236=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x1F0000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_TARGET_CRS3XX_98DX3236=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x1F0000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/LaCie/net2big_v2/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NET2BIG_V2=y
CONFIG_ENV_SIZE=0x1000
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_DAVINCI=y
-CONFIG_SYS_TEXT_BASE=0xc1080000
+CONFIG_TEXT_BASE=0xc1080000
CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_TARGET_DA850EVM=y
CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_DAVINCI=y
-CONFIG_SYS_TEXT_BASE=0x60000000
+CONFIG_TEXT_BASE=0x60000000
CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_TARGET_DA850EVM=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_DAVINCI=y
-CONFIG_SYS_TEXT_BASE=0xc1080000
+CONFIG_TEXT_BASE=0xc1080000
CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_TARGET_DA850EVM=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_KWD_CONFIG="board/Marvell/db-xc3-24g4xg/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_TARGET_DB_XC3_24G4XG=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_LPC32XX=y
-CONFIG_SYS_TEXT_BASE=0x83F00000
+CONFIG_TEXT_BASE=0x83F00000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=2
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x6EF000
CONFIG_ARM=y
CONFIG_SPL_SYS_L2_PL310=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_SPL_GPIO=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/d-link/dns325/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=1
CONFIG_TARGET_DNS325=y
CONFIG_ENV_SIZE=0x20000
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/Seagate/dockstar/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_DOCKSTAR=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_ARCH_SNAPDRAGON=y
-CONFIG_SYS_TEXT_BASE=0x8f600000
+CONFIG_TEXT_BASE=0x8f600000
CONFIG_SYS_MALLOC_LEN=0x802000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_ARCH_SNAPDRAGON=y
-CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_TEXT_BASE=0x80080000
CONFIG_SYS_MALLOC_LEN=0x804000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x4000
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/Marvell/dreamplug/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_DREAMPLUG=y
CONFIG_ENV_SIZE=0x1000
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/Synology/ds109/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_DS109=y
CONFIG_ENV_SIZE=0x10000
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARM_SMCCC=y
CONFIG_TARGET_DURIAN=y
-CONFIG_SYS_TEXT_BASE=0x500000
+CONFIG_TEXT_BASE=0x500000
CONFIG_SYS_MALLOC_LEN=0x101000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_TARGET_MVEBU_ARMADA_37XX=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x180000
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_LPC32XX=y
-CONFIG_SYS_TEXT_BASE=0x83000000
+CONFIG_TEXT_BASE=0x83000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_TARGET_EA_LPC3250DEVKITV2=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-eaidk-610"
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFF000000
+CONFIG_TEXT_BASE=0xFF000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282"
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_TEXT_BASE=0xF0000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282_internal"
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0x1101000
+CONFIG_TEXT_BASE=0x1101000
CONFIG_SYS_MALLOC_LEN=0x8000000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x60000000
+CONFIG_TEXT_BASE=0x60000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1"
CONFIG_ISA_ARCV2=y
CONFIG_CPU_ARCEM6=y
CONFIG_TARGET_EMSDP=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_LEN=0x10000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x1000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43E00000
+CONFIG_TEXT_BASE=0x43E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_ARCH_EXYNOS7=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x27000000
+CONFIG_TEXT_BASE=0x27000000
CONFIG_SYS_MALLOC_LEN=0x121000
CONFIG_TARGET_ETHERNUT5=y
CONFIG_AT91_EFLASH=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_MX6ULL=y
CONFIG_TARGET_O4_IMX6ULL_NANO=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_ASPEED=y
-CONFIG_SYS_TEXT_BASE=0x0
+CONFIG_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_TARGET_EVB_AST2500=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_POSITION_INDEPENDENT=y
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_ASPEED=y
-CONFIG_SYS_TEXT_BASE=0x80000000
+CONFIG_TEXT_BASE=0x80000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ASPEED_AST2600=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x60000000
+CONFIG_TEXT_BASE=0x60000000
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x60000000
+CONFIG_TEXT_BASE=0x60000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_OFFSET=0x0
CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
CONFIG_TPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x61000000
+CONFIG_TEXT_BASE=0x61000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00600000
+CONFIG_TEXT_BASE=0x00600000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00a00000
+CONFIG_TEXT_BASE=0x00a00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x60000000
+CONFIG_TEXT_BASE=0x60000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
CONFIG_ROCKCHIP_RV1108=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus"
CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF10000
+CONFIG_TEXT_BASE=0xFFF10000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x0
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x22900000
+CONFIG_TEXT_BASE=0x22900000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_TARGET_GARDENA_SMART_GATEWAY_AT91SAM=y
CONFIG_ATMEL_LEGACY=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xFE000000
+CONFIG_TEXT_BASE=0xFE000000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_SYS_MALLOC_F_LEN=0x600
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox"
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/Seagate/goflexhome/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_GOFLEXHOME=y
CONFIG_ENV_SIZE=0x20000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x18000000
+CONFIG_TEXT_BASE=0x18000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x73f00000
+CONFIG_TEXT_BASE=0x73f00000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_GURNARD=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/Marvell/guruplug/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_GURUPLUG=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1FFE0000
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SYS_DCACHE_OFF=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_HIGHBANK=y
-CONFIG_SYS_TEXT_BASE=0x00008000
+CONFIG_TEXT_BASE=0x00008000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=2
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_TARGET_HIKEY960=y
-CONFIG_SYS_TEXT_BASE=0x1ac98000
+CONFIG_TEXT_BASE=0x1ac98000
CONFIG_SYS_MALLOC_LEN=0x801000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=19000000
-CONFIG_SYS_TEXT_BASE=0x35000000
+CONFIG_TEXT_BASE=0x35000000
CONFIG_SYS_MALLOC_LEN=0x801000
CONFIG_NR_DRAM_BANKS=6
CONFIG_ENV_SIZE=0x1000
CONFIG_ISA_ARCV2=y
CONFIG_TARGET_HSDK=y
CONFIG_BOARD_HSDK_4XD=y
-CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_TEXT_BASE=0x81000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_DM_GPIO=y
CONFIG_ARC=y
CONFIG_ISA_ARCV2=y
CONFIG_TARGET_HSDK=y
-CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_TEXT_BASE=0x81000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_DM_GPIO=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/raidsonic/ib62x0/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_IB62X0=y
CONFIG_ENV_SIZE=0x20000
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/iomega/iconnect/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_ICONNECT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_MX28=y
-CONFIG_SYS_TEXT_BASE=0x40002000
+CONFIG_TEXT_BASE=0x40002000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_MX28=y
-CONFIG_SYS_TEXT_BASE=0x40002000
+CONFIG_TEXT_BASE=0x40002000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17780000
+CONFIG_TEXT_BASE=0x17780000
CONFIG_SYS_MALLOC_LEN=0x01000000
CONFIG_SYS_MALLOC_F_LEN=0x9000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SYS_MALLOC_F_LEN=0x18000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SYS_MALLOC_F_LEN=0x18000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2400000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2400000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8ULP=y
-CONFIG_SYS_TEXT_BASE=0x80200000
+CONFIG_TEXT_BASE=0x80200000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX9=y
-CONFIG_SYS_TEXT_BASE=0x80200000
+CONFIG_TEXT_BASE=0x80200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x18000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMXRT=y
-CONFIG_SYS_TEXT_BASE=0x80002000
+CONFIG_TEXT_BASE=0x80002000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_SYS_DCACHE_OFF=y
# CONFIG_SPL_SYS_DCACHE_OFF is not set
CONFIG_ARCH_IMXRT=y
-CONFIG_SYS_TEXT_BASE=0x80002000
+CONFIG_TEXT_BASE=0x80002000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_SYS_DCACHE_OFF=y
# CONFIG_SPL_SYS_DCACHE_OFF is not set
CONFIG_ARCH_IMXRT=y
-CONFIG_SYS_TEXT_BASE=0x20240000
+CONFIG_TEXT_BASE=0x20240000
CONFIG_SYS_MALLOC_LEN=0x8000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-is2.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_ENV_SIZE=0x1000
CONFIG_ARM=y
CONFIG_ARCH_INTEGRATOR=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x28000
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM720T=y
CONFIG_ARM=y
CONFIG_ARCH_INTEGRATOR=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x28000
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM920T=y
CONFIG_ARM=y
CONFIG_ARCH_INTEGRATOR=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x28000
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM926EJ_S=y
CONFIG_ARM=y
CONFIG_ARCH_INTEGRATOR=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x28000
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM946ES=y
CONFIG_ARM=y
CONFIG_ARCH_INTEGRATOR=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x22000
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM1136=y
CONFIG_ARM=y
CONFIG_ARCH_INTEGRATOR=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x22000
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM920T=y
CONFIG_ARM=y
CONFIG_ARCH_INTEGRATOR=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x22000
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM926EJ_S=y
CONFIG_ARM=y
CONFIG_ARCH_INTEGRATOR=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x22000
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM946ES=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_TARGET_IOT_DEVKIT=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_LEN=0x10000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x1000
CONFIG_SYS_BOARD="jethub-j100"
CONFIG_SYS_CONFIG_NAME="jethub"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SYS_BOARD="jethub-j80"
CONFIG_SYS_CONFIG_NAME="jethub"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
-CONFIG_SYS_TEXT_BASE=0xC000000
+CONFIG_TEXT_BASE=0xC000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
-CONFIG_SYS_TEXT_BASE=0xC000060
+CONFIG_TEXT_BASE=0xC000060
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
-CONFIG_SYS_TEXT_BASE=0xC000000
+CONFIG_TEXT_BASE=0xC000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
-CONFIG_SYS_TEXT_BASE=0xC000060
+CONFIG_TEXT_BASE=0xC000060
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
-CONFIG_SYS_TEXT_BASE=0xC000000
+CONFIG_TEXT_BASE=0xC000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
-CONFIG_SYS_TEXT_BASE=0xC000060
+CONFIG_TEXT_BASE=0xC000060
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
-CONFIG_SYS_TEXT_BASE=0xC000000
+CONFIG_TEXT_BASE=0xC000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
-CONFIG_SYS_TEXT_BASE=0xC000060
+CONFIG_TEXT_BASE=0xC000060
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-captain"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-v"
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SYS_BOARD="vim3"
CONFIG_SYS_CONFIG_NAME="khadas-vim3_android"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_SYS_BOARD="vim3"
CONFIG_SYS_CONFIG_NAME="khadas-vim3_android"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_BOARD="vim3"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SYS_BOARD="vim3"
CONFIG_SYS_CONFIG_NAME="khadas-vim3l_android"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_SYS_BOARD="vim3"
CONFIG_SYS_CONFIG_NAME="khadas-vim3l_android"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_BOARD="vim3"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xebf40000
+CONFIG_TEXT_BASE=0xebf40000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_TEXT_BASE=0xF0000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="kmcoge5ne"
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_TEXT_BASE=0xF0000000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_TEXT_BASE=0xF0000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="kmopti2"
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_TEXT_BASE=0xF0000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="kmsupm5"
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_TEXT_BASE=0xF0000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="kmtepr2"
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x77800000
+CONFIG_TEXT_BASE=0x77800000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x2200
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x60000000
+CONFIG_TEXT_BASE=0x60000000
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710"
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_DAVINCI=y
-CONFIG_SYS_TEXT_BASE=0xc1080000
+CONFIG_TEXT_BASE=0xc1080000
CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_LEGOEV3=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="libretech-ac"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ARM=y
CONFIG_SYS_BOARD="q200"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012A2G5RDB=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012A2G5RDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRDM=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRDM=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRWY=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRWY=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRWY=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRWY=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AQDS=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012ARDB=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012ARDB=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AIOT=y
-CONFIG_SYS_TEXT_BASE=0x40010000
+CONFIG_TEXT_BASE=0x40010000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AIOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATSN=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATSN=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AFRWY=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AFRWY=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046ARDB=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046ARDB=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046ARDB=y
-CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046ARDB=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046ARDB=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046ARDB=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1046ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088AQDS=y
-CONFIG_SYS_TEXT_BASE=0x30100000
+CONFIG_TEXT_BASE=0x30100000
CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088AQDS=y
-CONFIG_SYS_TEXT_BASE=0x20100000
+CONFIG_TEXT_BASE=0x20100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088AQDS=y
-CONFIG_SYS_TEXT_BASE=0x20100000
+CONFIG_TEXT_BASE=0x20100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088AQDS=y
-CONFIG_SYS_TEXT_BASE=0x80400000
+CONFIG_TEXT_BASE=0x80400000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088AQDS=y
-CONFIG_SYS_TEXT_BASE=0x80400000
+CONFIG_TEXT_BASE=0x80400000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088ARDB=y
-CONFIG_SYS_TEXT_BASE=0x20100000
+CONFIG_TEXT_BASE=0x20100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088ARDB=y
-CONFIG_SYS_TEXT_BASE=0x20100000
+CONFIG_TEXT_BASE=0x20100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088ARDB=y
-CONFIG_SYS_TEXT_BASE=0x80400000
+CONFIG_TEXT_BASE=0x80400000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088ARDB=y
-CONFIG_SYS_TEXT_BASE=0x80400000
+CONFIG_TEXT_BASE=0x80400000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=2
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1088ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=2
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080AQDS=y
-CONFIG_SYS_TEXT_BASE=0x30100000
+CONFIG_TEXT_BASE=0x30100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080AQDS=y
-CONFIG_SYS_TEXT_BASE=0x30100000
+CONFIG_TEXT_BASE=0x30100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080AQDS=y
-CONFIG_SYS_TEXT_BASE=0x80400000
+CONFIG_TEXT_BASE=0x80400000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080AQDS=y
-CONFIG_SYS_TEXT_BASE=0x20100000
+CONFIG_TEXT_BASE=0x20100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=3
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080AQDS=y
-CONFIG_SYS_TEXT_BASE=0x80400000
+CONFIG_TEXT_BASE=0x80400000
CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080ARDB=y
-CONFIG_SYS_TEXT_BASE=0x30100000
+CONFIG_TEXT_BASE=0x30100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080ARDB=y
-CONFIG_SYS_TEXT_BASE=0x30100000
+CONFIG_TEXT_BASE=0x30100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080ARDB=y
-CONFIG_SYS_TEXT_BASE=0x80400000
+CONFIG_TEXT_BASE=0x80400000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2081ARDB=y
-CONFIG_SYS_TEXT_BASE=0x20100000
+CONFIG_TEXT_BASE=0x20100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x20000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080ARDB=y
-CONFIG_SYS_TEXT_BASE=0x20100000
+CONFIG_TEXT_BASE=0x20100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080ARDB=y
-CONFIG_SYS_TEXT_BASE=0x20100000
+CONFIG_TEXT_BASE=0x20100000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS2080ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lschl.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_LSXL=y
CONFIG_ENV_SIZE=0x10000
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lsxhl.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_LSXL=y
CONFIG_LSXHL=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160ARDB=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2162AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2162AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2162AQDS=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x71000000
+CONFIG_TEXT_BASE=0x71000000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000
+CONFIG_TEXT_BASE=0xFFFFFFFFBE000000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000
+CONFIG_TEXT_BASE=0xFFFFFFFFBE000000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xBE000000
+CONFIG_TEXT_BASE=0xBE000000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xBE000000
+CONFIG_TEXT_BASE=0xBE000000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1FFE0000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_TARGET_MEESC=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21F00000
+CONFIG_TEXT_BASE=0x21F00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_MEESC=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_MICROBLAZE=y
-CONFIG_SYS_TEXT_BASE=0x29000000
+CONFIG_TEXT_BASE=0x29000000
CONFIG_SYS_MALLOC_LEN=0xc0000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x6EF000
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x60408000
+CONFIG_TEXT_BASE=0x60408000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_TEXT_BASE=0x40000000
CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_TEXT_BASE=0x40000000
CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_TEXT_BASE=0x40000000
CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_TEXT_BASE=0x40000000
CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_TEXT_BASE=0x40000000
CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb"
CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x81e00000
+CONFIG_TEXT_BASE=0x81e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x81e00000
+CONFIG_TEXT_BASE=0x81e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_SYS_ARCH_TIMER=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80000
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="mt7981-rfb"
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80000
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="mt7986a-rfb"
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80000
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80000
CONFIG_COUNTER_FREQUENCY=13000000
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x4c000000
+CONFIG_TEXT_BASE=0x4c000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_COUNTER_FREQUENCY=13000000
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x44e00000
+CONFIG_TEXT_BASE=0x44e00000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_COUNTER_FREQUENCY=13000000
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x4C000000
+CONFIG_TEXT_BASE=0x4C000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_COUNTER_FREQUENCY=13000000
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_MEDIATEK=y
-CONFIG_SYS_TEXT_BASE=0x40008000
+CONFIG_TEXT_BASE=0x40008000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_OCTEONTX2_CN913x=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_TARGET_MVEBU_ARMADA_37XX=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_MVEBU_ARMADA_8K=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_OCTEONTX2_CN913x=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_TARGET_MVEBU_ARMADA_37XX=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_MVEBU_ARMADA_8K=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_MVEBU_ARMADA_8K=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_MX23=y
-CONFIG_SYS_TEXT_BASE=0x40002000
+CONFIG_TEXT_BASE=0x40002000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX23=y
-CONFIG_SYS_TEXT_BASE=0x40002000
+CONFIG_TEXT_BASE=0x40002000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX28=y
-CONFIG_SYS_TEXT_BASE=0x40002000
+CONFIG_TEXT_BASE=0x40002000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x97800000
+CONFIG_TEXT_BASE=0x97800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x77800000
+CONFIG_TEXT_BASE=0x77800000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x77800000
+CONFIG_TEXT_BASE=0x77800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x77800000
+CONFIG_TEXT_BASE=0x77800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX7ULP=y
-CONFIG_SYS_TEXT_BASE=0x67800000
+CONFIG_TEXT_BASE=0x67800000
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX7ULP=y
-CONFIG_SYS_TEXT_BASE=0x67800000
+CONFIG_TEXT_BASE=0x67800000
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX7ULP=y
-CONFIG_SYS_TEXT_BASE=0x67800000
+CONFIG_TEXT_BASE=0x67800000
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopc-t4"
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s"
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/Seagate/nas220/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NAS220=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/LaCie/net2big_v2/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NET2BIG_V2=y
CONFIG_NET2BIG_V2=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-ns2l.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_NETSPACE_LITE_V2=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_NETSPACE_MAX_V2=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-ns2l.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_NETSPACE_MINI_V2=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_NETSPACE_V2=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_NSA310S=y
CONFIG_ARC=y
CONFIG_TARGET_NSIM=y
CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape"
-CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_TEXT_BASE=0x81000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_TARGET_NSIM=y
CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape"
-CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_TEXT_BASE=0x81000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ISA_ARCV2=y
CONFIG_TARGET_NSIM=y
CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs"
-CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_TEXT_BASE=0x81000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_TARGET_NSIM=y
CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs"
-CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_TEXT_BASE=0x81000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x81000100
+CONFIG_TEXT_BASE=0x81000100
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_MX6ULL=y
CONFIG_TARGET_O4_IMX6ULL_NANO=y
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xffffffff80000000
+CONFIG_TEXT_BASE=0xffffffff80000000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=2
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xffffffff80000000
+CONFIG_TEXT_BASE=0xffffffff80000000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_OCTEONTX2=y
-CONFIG_SYS_TEXT_BASE=0x04000000
+CONFIG_TEXT_BASE=0x04000000
CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_OCTEONTX2=y
-CONFIG_SYS_TEXT_BASE=0x04000000
+CONFIG_TEXT_BASE=0x04000000
CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_OCTEONTX=y
-CONFIG_SYS_TEXT_BASE=0x2800000
+CONFIG_TEXT_BASE=0x2800000
CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_OCTEONTX=y
-CONFIG_SYS_TEXT_BASE=0x2800000
+CONFIG_TEXT_BASE=0x2800000
CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_BOARD="odroid-n2"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_BOARD="odroid-n2"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_BOARD="odroid-n2"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43E00000
+CONFIG_TEXT_BASE=0x43E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS5=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43e00000
+CONFIG_TEXT_BASE=0x43e00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS4=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_TI_COMMON_CMD_OPTIONS=y
# CONFIG_SPL_GPIO is not set
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_TI_COMMON_CMD_OPTIONS=y
# CONFIG_SPL_GPIO is not set
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_TI_COMMON_CMD_OPTIONS=y
# CONFIG_SPL_GPIO is not set
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_TI_COMMON_CMD_OPTIONS=y
# CONFIG_SPL_GPIO is not set
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_DAVINCI=y
-CONFIG_SYS_TEXT_BASE=0xc1080000
+CONFIG_TEXT_BASE=0xc1080000
CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_TARGET_OMAPL138_LCDK=y
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x80200000
+CONFIG_TEXT_BASE=0x80200000
CONFIG_SYS_MALLOC_LEN=0x10000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="openpiton-riscv64"
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x80000000
+CONFIG_TEXT_BASE=0x80000000
CONFIG_SYS_MALLOC_LEN=0x10000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="openpiton-riscv64"
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_OPENRD=y
CONFIG_ENV_SIZE=0x20000
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_OPENRD=y
CONFIG_BOARD_IS_OPENRD_CLIENT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_OPENRD=y
CONFIG_BOARD_IS_OPENRD_ULTIMATE=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi"
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43E00000
+CONFIG_TEXT_BASE=0x43E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_BOARD="p201"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_TEXT_BASE=0x80080000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=19200000
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_TEXT_BASE=0x80080000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_TEXT_BASE=0x80080000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_COUNTER_FREQUENCY=19200000
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_TEXT_BASE=0x80080000
CONFIG_NR_DRAM_BANKS=1026
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_COUNTER_FREQUENCY=19200000
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_TEXT_BASE=0x80080000
CONFIG_NR_DRAM_BANKS=1026
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_COUNTER_FREQUENCY=19200000
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_TEXT_BASE=0x80080000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
-CONFIG_SYS_TEXT_BASE=0x3f401000
+CONFIG_TEXT_BASE=0x3f401000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x23E00000
+CONFIG_TEXT_BASE=0x23E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS5=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x23E00000
+CONFIG_TEXT_BASE=0x23E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS5=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=8333333
CONFIG_TARGET_PG_WCOM_EXPU1=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1004000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=8333333
CONFIG_TARGET_PG_WCOM_EXPU1=y
-CONFIG_SYS_TEXT_BASE=0x60240000
+CONFIG_TEXT_BASE=0x60240000
CONFIG_SYS_MALLOC_LEN=0x1004000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=8333333
CONFIG_TARGET_PG_WCOM_SELI8=y
-CONFIG_SYS_TEXT_BASE=0x60100000
+CONFIG_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1004000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=8333333
CONFIG_TARGET_PG_WCOM_SELI8=y
-CONFIG_SYS_TEXT_BASE=0x60240000
+CONFIG_TEXT_BASE=0x60240000
CONFIG_SYS_MALLOC_LEN=0x1004000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x9D004000
+CONFIG_TEXT_BASE=0x9D004000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_MALLOC_F_LEN=0x600
CONFIG_ENV_SIZE=0x4000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1FFE0000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0
+CONFIG_TEXT_BASE=0
CONFIG_SYS_MALLOC_LEN=0x50000
CONFIG_TARGET_PM9261=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0
+CONFIG_TEXT_BASE=0
CONFIG_SYS_MALLOC_LEN=0x50000
CONFIG_TARGET_PM9263=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x73f00000
+CONFIG_TEXT_BASE=0x73f00000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_TARGET_PM9G45=y
CONFIG_ATMEL_LEGACY=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_e02/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_POGO_E02=y
CONFIG_ENV_SIZE=0x20000
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_v4/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_POGO_V4=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_L2_PL310=y
CONFIG_ARCH_NPCM=y
-CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_TEXT_BASE=0x8200
CONFIG_SYS_MALLOC_LEN=0x240000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_TARGET_POMELO=y
-CONFIG_SYS_TEXT_BASE=0x180000
+CONFIG_TEXT_BASE=0x180000
CONFIG_SYS_MALLOC_LEN=0x101000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_TARGET_POPLAR=y
-CONFIG_SYS_TEXT_BASE=0x37000000
+CONFIG_TEXT_BASE=0x37000000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xf00000
+CONFIG_TEXT_BASE=0xf00000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="qemu-ppce500"
CONFIG_SYS_CLK_FREQ=33000000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0x1110000
+CONFIG_TEXT_BASE=0x1110000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x40000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x40000
CONFIG_SH=y
-CONFIG_SYS_TEXT_BASE=0x8FE00000
+CONFIG_TEXT_BASE=0x8FE00000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x40000
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x40000
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x40000
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC00000
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00600000
+CONFIG_TEXT_BASE=0x00600000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4c"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_TEXT_BASE=0x00100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8"
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960"
CONFIG_SYS_PROMPT="rock960 => "
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x60000000
+CONFIG_TEXT_BASE=0x60000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00008000
+CONFIG_TEXT_BASE=0x00008000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_RPI_0_W=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00008000
+CONFIG_TEXT_BASE=0x00008000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_RPI_2=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00008000
+CONFIG_TEXT_BASE=0x00008000
CONFIG_TARGET_RPI_3_32B=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00080000
+CONFIG_TEXT_BASE=0x00080000
CONFIG_TARGET_RPI_3=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00080000
+CONFIG_TEXT_BASE=0x00080000
CONFIG_TARGET_RPI_3=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00008000
+CONFIG_TEXT_BASE=0x00008000
CONFIG_TARGET_RPI_4_32B=y
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b"
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00080000
+CONFIG_TEXT_BASE=0x00080000
CONFIG_TARGET_RPI_4=y
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b"
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00080000
+CONFIG_TEXT_BASE=0x00080000
CONFIG_TARGET_RPI_ARM64=y
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b"
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
-CONFIG_SYS_TEXT_BASE=0x00008000
+CONFIG_TEXT_BASE=0x00008000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_RPI=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_NEXELL=y
-CONFIG_SYS_TEXT_BASE=0x74C00000
+CONFIG_TEXT_BASE=0x74C00000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_S5PC1XX=y
-CONFIG_SYS_TEXT_BASE=0x34800000
+CONFIG_TEXT_BASE=0x34800000
CONFIG_SYS_MALLOC_LEN=0x5001000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=3
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x44800000
+CONFIG_TEXT_BASE=0x44800000
CONFIG_SYS_MALLOC_LEN=0x5001000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS4=y
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_SAM9X60_CURIOSITY=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_SAM9X60EK=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_SAM9X60EK=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_SAM9X60EK=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_ICP=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_ICP=y
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_PTC_EK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_PTC_EK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DM_GPIO=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DM_GPIO=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x66f00000
+CONFIG_TEXT_BASE=0x66f00000
CONFIG_SYS_MALLOC_F_LEN=0x11000
CONFIG_TARGET_SAMA7G5EK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x66f00000
+CONFIG_TEXT_BASE=0x66f00000
CONFIG_SYS_MALLOC_F_LEN=0x11000
CONFIG_TARGET_SAMA7G5EK=y
CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_TEXT_BASE=0
+CONFIG_TEXT_BASE=0
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
-CONFIG_SYS_TEXT_BASE=0
+CONFIG_TEXT_BASE=0
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
-CONFIG_SYS_TEXT_BASE=0
+CONFIG_TEXT_BASE=0
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
-CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_TEXT_BASE=0x200000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_TEXT_BASE=0x200000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_TEXT_BASE=0x200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_BOARD="sei510"
CONFIG_SYS_CONFIG_NAME="sei510"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x8000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_SYS_BOARD="sei610"
CONFIG_SYS_CONFIG_NAME="sei610"
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_LEN=0x8000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_MIPS=y
CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
CONFIG_ROCKCHIP_RK3368=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/Marvell/sheevaplug/kwbimage.cfg"
-CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_SHEEVAPLUG=y
CONFIG_ENV_SIZE=0x20000
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x10000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_RISCV=y
-CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0xfff000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23000000
+CONFIG_TEXT_BASE=0x23000000
CONFIG_SYS_MALLOC_LEN=0x460000
CONFIG_TARGET_SMARTWEB=y
CONFIG_AT91_GPIO_PULLUP=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43E00000
+CONFIG_TEXT_BASE=0x43E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS5=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x23E00000
+CONFIG_TEXT_BASE=0x23E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS5=y
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_S5PC1XX=y
-CONFIG_SYS_TEXT_BASE=0x34800000
+CONFIG_TEXT_BASE=0x34800000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43E00000
+CONFIG_TEXT_BASE=0x43E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=2
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43E00000
+CONFIG_TEXT_BASE=0x43E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS5=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=400000000
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_TEXT_BASE=0x200000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=400000000
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x1000
+CONFIG_TEXT_BASE=0x1000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=400000000
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_TEXT_BASE=0x200000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=400000000
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_TEXT_BASE=0x200000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=400000000
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x1000
+CONFIG_TEXT_BASE=0x1000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=400000000
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_TEXT_BASE=0x200000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=400000000
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_TEXT_BASE=0x200000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=400000000
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x1000
+CONFIG_TEXT_BASE=0x1000
CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_PPC=y
CONFIG_SYS_IMMR=0xE0000000
-CONFIG_SYS_TEXT_BASE=0xfff80000
+CONFIG_TEXT_BASE=0xfff80000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="socrates"
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x6EF000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43E00000
+CONFIG_TEXT_BASE=0x43E00000
CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS5=y
CONFIG_SUPPORT_PASSING_ATAGS=y
# CONFIG_SETUP_MEMORY_TAGS is not set
CONFIG_INITRD_TAG=y
-CONFIG_SYS_TEXT_BASE=0x100000
+CONFIG_TEXT_BASE=0x100000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_STI=y
-CONFIG_SYS_TEXT_BASE=0x7D600000
+CONFIG_TEXT_BASE=0x7D600000
CONFIG_SYS_MALLOC_LEN=0x1800000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08000000
+CONFIG_TEXT_BASE=0x08000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08009000
+CONFIG_TEXT_BASE=0x08009000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08000000
+CONFIG_TEXT_BASE=0x08000000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08000000
+CONFIG_TEXT_BASE=0x08000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08000000
+CONFIG_TEXT_BASE=0x08000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08000000
+CONFIG_TEXT_BASE=0x08000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08009000
+CONFIG_TEXT_BASE=0x08009000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08000000
+CONFIG_TEXT_BASE=0x08000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08009000
+CONFIG_TEXT_BASE=0x08009000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08000000
+CONFIG_TEXT_BASE=0x08000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08000000
+CONFIG_TEXT_BASE=0x08000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x90000000
+CONFIG_TEXT_BASE=0x90000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x47E00000
+CONFIG_TEXT_BASE=0x47E00000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x40000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_TARGET_STV0991=y
-CONFIG_SYS_TEXT_BASE=0x00010000
+CONFIG_TEXT_BASE=0x00010000
CONFIG_SYS_MALLOC_LEN=0x14000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ARM=y
CONFIG_ARCH_SYNQUACER=y
-CONFIG_SYS_TEXT_BASE=0x08200000
+CONFIG_TEXT_BASE=0x08200000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x30000
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_TEXT_BASE=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub"
CONFIG_SPL_STACK_R_ADDR=0x200000
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x21000000
+CONFIG_TEXT_BASE=0x21000000
CONFIG_SYS_MALLOC_LEN=0x460000
CONFIG_TARGET_TAURUS=y
CONFIG_AT91_GPIO_PULLUP=y
CONFIG_ARC=y
CONFIG_TARGET_TB100=y
-CONFIG_SYS_TEXT_BASE=0x84000000
+CONFIG_TEXT_BASE=0x84000000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x800
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x8000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1FFE0000
CONFIG_ARM=y
CONFIG_TARGET_TEN64=y
CONFIG_TFABOOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TEXT_BASE=0x82000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x80000
CONFIG_ENV_OFFSET=0x500000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x6EC000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x6EC000
CONFIG_X86=y
-CONFIG_SYS_TEXT_BASE=0xFFF00000
+CONFIG_TEXT_BASE=0xFFF00000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x6EC000
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25165824
CONFIG_TARGET_THUNDERX_88XX=y
-CONFIG_SYS_TEXT_BASE=0x00500000
+CONFIG_TEXT_BASE=0x00500000
CONFIG_SYS_MALLOC_LEN=0x101000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_ARCH_TIMER=y
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_TEXT_BASE=0
+CONFIG_TEXT_BASE=0
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_TEXT_BASE=0x4000000
CONFIG_ENV_SIZE=0x8000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami"
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_TEXT_BASE=0x4000000
CONFIG_ENV_SIZE=0x8000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite"
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_TEXT_BASE=0x4000000
CONFIG_ENV_SIZE=0x8000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus"
CONFIG_ARM=y
CONFIG_TARGET_TOTAL_COMPUTE=y
-CONFIG_SYS_TEXT_BASE=0xe0000000
+CONFIG_TEXT_BASE=0xe0000000
CONFIG_SYS_MALLOC_LEN=0x3200000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2a00000
CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0xA1000000
+CONFIG_TEXT_BASE=0xA1000000
CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_ENV_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300"
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x43e00000
+CONFIG_TEXT_BASE=0x43e00000
CONFIG_SYS_MALLOC_LEN=0x5001000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_EXYNOS=y
-CONFIG_SYS_TEXT_BASE=0x63300000
+CONFIG_TEXT_BASE=0x63300000
CONFIG_SYS_MALLOC_LEN=0x5001000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFE000
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_TEXT_BASE=0xF0000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="kmtuge1"
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_TURRIS_MOX=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ARCH_CPU_INIT=y
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_TEXT_BASE=0xF0000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="kmtuxa1"
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_TARGET_MVEBU_ARMADA_37XX=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x180000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_TEXT_BASE=0x84000000
+CONFIG_TEXT_BASE=0x84000000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref"
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_TEXT_BASE=0x84000000
+CONFIG_TEXT_BASE=0x84000000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka"
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARM_SMCCC=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TEXT_BASE=0x23f00000
CONFIG_SYS_MALLOC_LEN=0x26000
CONFIG_TARGET_USB_A9263=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x77800000
+CONFIG_TEXT_BASE=0x77800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x86000000
+CONFIG_TEXT_BASE=0x86000000
CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x80110000
+CONFIG_TEXT_BASE=0x80110000
CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x00110000
+CONFIG_TEXT_BASE=0x00110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
-CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_TEXT_BASE=0x40200000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_TARGET_VEXPRESS_CA9X4=y
-CONFIG_SYS_TEXT_BASE=0x60800000
+CONFIG_TEXT_BASE=0x60800000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x40000
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
-CONFIG_SYS_TEXT_BASE=0x3f401000
+CONFIG_TEXT_BASE=0x3f401000
CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
-CONFIG_SYS_TEXT_BASE=0x3f401000
+CONFIG_TEXT_BASE=0x3f401000
CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
-CONFIG_SYS_TEXT_BASE=0x20f00000
+CONFIG_TEXT_BASE=0x20f00000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_TARGET_VINCO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_TEXT_BASE=0x00100000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_MESON=y
-CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_LPC32XX=y
-CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_TARGET_XENGUEST_ARM64=y
-CONFIG_SYS_TEXT_BASE=0x40080000
+CONFIG_TEXT_BASE=0x40080000
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_SYS_ICACHE_OFF=y
CONFIG_COUNTER_FREQUENCY=100000000
CONFIG_ARCH_VERSAL=y
-CONFIG_SYS_TEXT_BASE=0xFFFC0000
+CONFIG_TEXT_BASE=0xFFFC0000
CONFIG_SYS_MALLOC_LEN=0x2000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=3
CONFIG_SYS_ICACHE_OFF=y
CONFIG_COUNTER_FREQUENCY=100000000
CONFIG_ARCH_VERSAL=y
-CONFIG_SYS_TEXT_BASE=0x10000
+CONFIG_TEXT_BASE=0x10000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_SYS_ICACHE_OFF=y
CONFIG_COUNTER_FREQUENCY=100000000
CONFIG_ARCH_VERSAL=y
-CONFIG_SYS_TEXT_BASE=0x10000
+CONFIG_TEXT_BASE=0x10000
CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
# CONFIG_ARM64_CRC32 is not set
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_VERSAL_NET=y
-CONFIG_SYS_TEXT_BASE=0xBBF10000
+CONFIG_TEXT_BASE=0xBBF10000
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=3
CONFIG_POSITION_INDEPENDENT=y
CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864
CONFIG_ARCH_VERSAL_NET=y
-CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-net-virt"
CONFIG_SYS_PROMPT="Versal NET> "
CONFIG_POSITION_INDEPENDENT=y
CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864
CONFIG_ARCH_VERSAL=y
-CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt"
CONFIG_SYS_PROMPT="Versal> "
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_TEXT_BASE=0x4000000
CONFIG_ENV_OFFSET=0xE00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706"
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi"
CONFIG_SYS_ICACHE_OFF=y
CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_TEXT_BASE=0xFFFC0000
+CONFIG_TEXT_BASE=0xFFFC0000
CONFIG_SYS_MALLOC_LEN=0x1a00
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini"
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc"
CONFIG_SYS_ICACHE_OFF=y
CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_TEXT_BASE=0x10000
+CONFIG_TEXT_BASE=0x10000
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc"
CONFIG_SYS_ICACHE_OFF=y
CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_TEXT_BASE=0x10000
+CONFIG_TEXT_BASE=0x10000
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_nand"
CONFIG_SYS_ICACHE_OFF=y
CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_TEXT_BASE=0x10000
+CONFIG_TEXT_BASE=0x10000
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_nand"
CONFIG_SYS_ICACHE_OFF=y
CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_TEXT_BASE=0x10000
+CONFIG_TEXT_BASE=0x10000
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi"
CONFIG_SYS_ICACHE_OFF=y
CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_TEXT_BASE=0xFFFC0000
+CONFIG_TEXT_BASE=0xFFFC0000
CONFIG_SYS_MALLOC_LEN=0x1b00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ZYNQMP_R5=y
-CONFIG_SYS_TEXT_BASE=0x10000000
+CONFIG_TEXT_BASE=0x10000000
CONFIG_SYS_MALLOC_LEN=0x1400000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_LEN=0x4040000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_DM_GPIO=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x100000
+CONFIG_TEXT_BASE=0x100000
CONFIG_SYS_MALLOC_LEN=0x8000
CONFIG_ENV_SIZE=0x190
CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand"
CONFIG_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0xFFFC0000
+CONFIG_TEXT_BASE=0xFFFC0000
CONFIG_SYS_MALLOC_LEN=0x1000
CONFIG_ENV_SIZE=0x190
CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor"
CONFIG_SYS_DCACHE_OFF=y
CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0xFFFC0000
+CONFIG_TEXT_BASE=0xFFFC0000
CONFIG_SYS_MALLOC_LEN=0x1000
CONFIG_ENV_SIZE=0x190
CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
-----------------------------------------------------------------------------
For boards which boot from spl, it is possible to save one copy
-if CONFIG_SYS_TEXT_BASE == relocation address! This prevents that uboot code
+if CONFIG_TEXT_BASE == relocation address! This prevents that uboot code
is copied again in relocate_code().
example for the tx25 board booting from NAND Flash:
f) u-boot code steps through board_init_f() and calculates
the relocation address and copy itself to it
-If CONFIG_SYS_TEXT_BASE == relocation address, the copying of u-boot
+If CONFIG_TEXT_BASE == relocation address, the copying of u-boot
in f) could be saved.
-----------------------------------------------------------------------------
- fill in struct bd_info infos (check)
- adapt all boards
-- maybe adapt CONFIG_SYS_TEXT_BASE (this must be checked from board maintainers)
+- maybe adapt CONFIG_TEXT_BASE (this must be checked from board maintainers)
This *must* be done for boards, which boot from NOR flash
- on other boards if CONFIG_SYS_TEXT_BASE = relocation baseaddr, this saves
+ on other boards if CONFIG_TEXT_BASE = relocation baseaddr, this saves
one copying from u-boot code.
- new function dram_init_banksize() is actual board specific. Maybe
- This u-boot does no RAM init, nor CPU register setup. Just look
where it has to copy and relocate itself to this address. If
- relocate address = CONFIG_SYS_TEXT_BASE (not the same, as the
+ relocate address = CONFIG_TEXT_BASE (not the same, as the
CONFIG_SPL_TEXT_BASE from the spl code), then there is no need
to copy, just go on with bss clear and jump to board_init_r.
0x40200800 - 0x4020BBFF: Area for SPL text, data and rodata
0x4020E000 - 0x4020FFFC: Area for the SPL stack.
0x80000000 - 0x8007FFFF: Area for the SPL BSS.
-0x80100000: CONFIG_SYS_TEXT_BASE of U-Boot
+0x80100000: CONFIG_TEXT_BASE of U-Boot
0x80208000 - 0x80307FFF: malloc() pool available to SPL.
Option 2 (SPL or X-Loader):
0x40200800 - 0x4020BBFF: Area for SPL text, data and rodata
0x4020E000 - 0x4020FFFC: Area for the SPL stack.
-0x80008000: CONFIG_SYS_TEXT_BASE of U-Boot
+0x80008000: CONFIG_TEXT_BASE of U-Boot
0x87000000 - 0x8707FFFF: Area for the SPL BSS.
0x87080000 - 0x870FFFFF: malloc() pool available to SPL.
For the areas that reside within DDR1 they must not be used prior to s_init()
-completing. Note that CONFIG_SYS_TEXT_BASE must be clear of the areas that SPL
+completing. Note that CONFIG_TEXT_BASE must be clear of the areas that SPL
uses while running. This is why we have two versions of the memory map that
only vary in where the BSS and malloc pool reside.
initial vector table and basic processor initialization will not
be compiled in. The start address of U-Boot must be adjusted in
the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile
-(CONFIG_SYS_TEXT_BASE) to the load address.
+(CONFIG_TEXT_BASE) to the load address.
ColdFire CPU specific options/settings
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
f0000 CONFIG_PRE_CON_BUF_ADDR Pre-console buffer
100000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used
as the SPL load buffer in spl_test_load().
- 200000 CONFIG_SYS_TEXT_BASE Load buffer for U-Boot (sandbox_spl only)
+ 200000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only)
======= ======================== ===============================
$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
-f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
-Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
+Make sure 0x1110000 matches CONFIG_TEXT_BASE, which is the symbol address
of _x86boot_start (in arch/x86/cpu/start.S).
If you want to use ELF as the coreboot payload, change U-Boot configuration to
10000000 Memory reserved by coreboot for mapping PCI devices
(typical size 2151000, includes framebuffer)
1920000 CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup
- 1110000 CONFIG_SYS_TEXT_BASE (start address of U-Boot code, before reloc)
+ 1110000 CONFIG_TEXT_BASE (start address of U-Boot code, before reloc)
110000 CONFIG_BLOBLIST_ADDR (before being relocated)
100000 CONFIG_PRE_CON_BUF_ADDR
f0000 ACPI tables set up by U-Boot
known issue with Intel SoCs with modern DRAM and apparently cannot be improved.
The MRC caches are used to work around this.
-Once SPL is finished it loads U-Boot into SDRAM at CONFIG_SYS_TEXT_BASE, which
+Once SPL is finished it loads U-Boot into SDRAM at CONFIG_TEXT_BASE, which
is normally 1110000. Note that CAR is still active.
f0000 CONFIG_ROM_TABLE_ADDR
120000 BSS (defined in u-boot-spl.lds)
200000 FSP-S (which is run after U-Boot is relocated)
- 1110000 CONFIG_SYS_TEXT_BASE
+ 1110000 CONFIG_TEXT_BASE
Speeding up SPL for development
:fffd8000: TPL_TEXT_BASE
:fffa0000: X86_MRC_ADDR
:fff90000: VGA_BIOS_ADDR
- :ffed0000: SYS_TEXT_BASE
+ :ffed0000: TEXT_BASE
:ffea0000: X86_REFCODE_ADDR
:ffe70000: SPL_TEXT_BASE
:ffbf8000: CONFIG_ENV_OFFSET (environemnt offset)
500000 <spare>
6ef000 Environment CONFIG_ENV_OFFSET
6f0000 MRC cache CONFIG_ENABLE_MRC_CACHE
-700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE
+700000 u-boot-dtb.bin CONFIG_TEXT_BASE
7b0000 vga.bin CONFIG_VGA_BIOS_ADDR
7c0000 fsp.bin CONFIG_FSP_ADDR
7f8000 <spare> (depends on size of fsp.bin)
+GEN_CFG_DATA.PayloadId | 'U-BT'
2. Update payload text base. PAYLOAD_EXE_BASE must be the same as U-Boot
- CONFIG_SYS_TEXT_BASE in board/intel/slimbootloader/Kconfig.
+ CONFIG_TEXT_BASE in board/intel/slimbootloader/Kconfig.
PAYLOAD_LOAD_HIGH must be 0::
$ vi Platform/QemuBoardPkg/BoardConfig.py
2. Update payload text base.
-* PAYLOAD_EXE_BASE must be the same as U-Boot CONFIG_SYS_TEXT_BASE
+* PAYLOAD_EXE_BASE must be the same as U-Boot CONFIG_TEXT_BASE
in board/intel/slimbootloader/Kconfig.
* PAYLOAD_LOAD_HIGH must be 0::
SDPU: jump -addr 0x877fffc0
SDPU: done
-Please note that the address above is calculated based on SYS_TEXT_BASE address:
+Please note that the address above is calculated based on TEXT_BASE address:
-0x877fffc0 = 0x87800000 (SYS_TEXT_BASE) - 0x40 (U-Boot proper Header size)
+0x877fffc0 = 0x87800000 (TEXT_BASE) - 0x40 (U-Boot proper Header size)
Power on the target and run the following command from U-Boot root directory:
As OpenSBI will be loaded at 0x80000000 we have to adjust the U-Boot text base.
Furthermore we have to enable building U-Boot for S-mode::
- CONFIG_SYS_TEXT_BASE=0x80020000
+ CONFIG_TEXT_BASE=0x80020000
CONFIG_RISCV_SMODE=y
Both settings are contained in sipeed_maix_smode_defconfig so we can build
FW_PAYLOAD_OFFSET=0x20000 \
FW_PAYLOAD_PATH=<path to U-Boot>/u-boot-dtb.bin
-The value of FW_PAYLOAD_OFFSET must match CONFIG_SYS_TEXT_BASE - 0x80000000.
+The value of FW_PAYLOAD_OFFSET must match CONFIG_TEXT_BASE - 0x80000000.
The file to flash is build/platform/kendryte/k210/firmware/fw_payload.bin.
The 'data' property of the FIT is set up to start at offset 0x100 bytes into
-the file. The change to CONFIG_SYS_TEXT_BASE is also an offset of 0x100 bytes
+the file. The change to CONFIG_TEXT_BASE is also an offset of 0x100 bytes
from the load address. If this changes, you either need to modify U-Boot to be
fully relocatable, or expect it to hang.
Change::
- #define CONFIG_SYS_TEXT_BASE 0x00100000
+ #define CONFIG_TEXT_BASE 0x00100000
to::
- #define CONFIG_SYS_TEXT_BASE 0x02000100
+ #define CONFIG_TEXT_BASE 0x02000100
addresses. This means that U-Boot must be able to boot from whatever
address Depthcharge happens to use (it is the CONFIG_KERNEL_START setting
in Depthcharge). In practice this means that the data in the kernel@1 FIT node
-(see above) must start at the same address as U-Boot's CONFIG_SYS_TEXT_BASE.
+(see above) must start at the same address as U-Boot's CONFIG_TEXT_BASE.
you are moving.
Then run this tool giving CONFIG names you want to move.
-For example, if you want to move CONFIG_CMD_USB and CONFIG_SYS_TEXT_BASE,
+For example, if you want to move CONFIG_CMD_USB and CONFIG_TEXT_BASE,
simply type as follows::
- $ tools/moveconfig.py CONFIG_CMD_USB CONFIG_SYS_TEXT_BASE
+ $ tools/moveconfig.py CONFIG_CMD_USB CONFIG_TEXT_BASE
The tool walks through all the defconfig files and move the given CONFIGs.
# 3) Sign u-boot.itb
# fitImage tree
-fit_block_base=$(printf "0x%x" $(( $(sed -n "/CONFIG_SYS_TEXT_BASE=/ s@.*=@@p" .config) - $(sed -n "/CONFIG_FIT_EXTERNAL_OFFSET=/ s@.*=@@p" .config) - 0x200 - 0x40)) )
+fit_block_base=$(printf "0x%x" $(( $(sed -n "/CONFIG_TEXT_BASE=/ s@.*=@@p" .config) - $(sed -n "/CONFIG_FIT_EXTERNAL_OFFSET=/ s@.*=@@p" .config) - 0x200 - 0x40)) )
fit_block_offset=$(printf "0x%s" $(fdtget -t x u-boot.dtb /binman/imx-boot/uboot offset))
fit_block_size=$(printf "0x%x" $(( ( ($(fdtdump u-boot.itb 2>/dev/null | sed -n "/^...totalsize:/ s@.*\(0x[0-9a-f]\+\).*@\1@p") + 0x1000 - 0x1 ) & ~(0x1000 - 0x1)) + 0x20 )) )
sed -i "/Blocks = / s@.*@ Blocks = $fit_block_base $fit_block_offset $fit_block_size \"flash.bin\", \\\\@" csf_fit.tmp
The diagram below illustrate a signed U-Boot binary, DT blob and external
ATF BL31 blob combined to form fitImage part of flash.bin container layout.
-The *load_address is derived from CONFIG_SYS_TEXT_BASE such that the U-Boot
+The *load_address is derived from CONFIG_TEXT_BASE such that the U-Boot
binary *start is placed exactly at CONFIG_SPL_TEXT_BASE in DRAM, however the
SPL moves the fitImage tree further to location:
*load_address = CONFIG_SPL_TEXT_BASE - CONFIG_FIT_EXTERNAL_OFFSET (=12kiB) -
CSF "Blocks" line for csf_fit.txt can be generated as follows:
```
# fitImage tree
-fit_block_base=$(printf "0x%x" $(( $(sed -n "/CONFIG_SYS_TEXT_BASE=/ s@.*=@@p" .config) - $(sed -n "/CONFIG_FIT_EXTERNAL_OFFSET=/ s@.*=@@p" .config) - 0x200 - 0x40)) )
+fit_block_base=$(printf "0x%x" $(( $(sed -n "/CONFIG_TEXT_BASE=/ s@.*=@@p" .config) - $(sed -n "/CONFIG_FIT_EXTERNAL_OFFSET=/ s@.*=@@p" .config) - 0x200 - 0x40)) )
fit_block_offset=$(printf "0x%s" $(fdtget -t x u-boot.dtb /binman/imx-boot/uboot offset))
fit_block_size=$(printf "0x%x" $(( ( $(fdtdump u-boot.itb 2>/dev/null | sed -n "/^...totalsize:/ s@.*\(0x[0-9a-f]\+\).*@\1@p") + 0x1000 - 0x1 ) & ~(0x1000 - 0x1) + 0x20 )) )
sed -i "/Blocks = / s@.*@ Blocks = $fit_block_base $fit_block_offset $fit_block_size \"flash.bin\", \\\\@" csf_fit.tmp
#define CONFIG_SYS_SDRAM_BASE 0x00000000
/* FLASH organization */
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_FLASH_BASE CONFIG_TEXT_BASE
/*
* For booting Linux, the board info and command line data
"netdev=" CONFIG_NETDEV "\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
"tftpflash=tftp $loadaddr $uboot;" \
- "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "protect off " __stringify(CONFIG_TEXT_BASE) \
" +$filesize; " \
- "erase " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "erase " __stringify(CONFIG_TEXT_BASE) \
" +$filesize; " \
- "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \
" $filesize; " \
- "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "protect on " __stringify(CONFIG_TEXT_BASE) \
" +$filesize; " \
- "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \
" $filesize\0" \
"fdtaddr=780000\0" \
"fdtfile=" CONFIG_FDTFILE "\0" \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "protect off " __stringify(CONFIG_TEXT_BASE) \
" +$filesize; " \
- "erase " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "erase " __stringify(CONFIG_TEXT_BASE) \
" +$filesize; " \
- "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \
" $filesize; " \
- "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "protect on " __stringify(CONFIG_TEXT_BASE) \
" +$filesize; " \
- "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \
+ "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \
" $filesize\0" \
"consoledev=ttyS1\0" \
"ramdiskaddr=2000000\0" \
#define __CONFIG_H
#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#endif
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
/* Set 1M boot space */
-#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000)
+#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
"bank_intlv=cs0_cs1\0" \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
- "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \
(0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR)
/* Set 1M boot space for PCIe boot */
-#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000)
+#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
"hwconfig=fsl_ddr:ctlr_intlv=cacheline," \
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
- "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
"bootargs=root=/dev/ram rw console=ttyS0,115200\0" \
"netdev=eth0\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
- "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
#define CONFIG_SRIO_PCIE_BOOT_MASTER
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
/* Set 1M boot space */
-#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000)
+#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
- "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
#define CONFIG_SRIO_PCIE_BOOT_MASTER
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
/* Set 1M boot space */
-#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000)
+#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
- "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
#ifdef CONFIG_RAMBOOT_PBL
#ifndef CONFIG_SDCARD
-#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#else
#define RESET_VECTOR_OFFSET 0x27FFC
"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
- "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
+ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
#define CONFIG_SYS_NAND_ECCBYTES 13
#define CONFIG_SYS_NAND_MAX_OOBFREE 2
#define CONFIG_SYS_NAND_MAX_ECCPOS 56
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
/* NAND block size is 128 KiB. Synchronize these values with
* corresponding Device Tree entries in Linux:
* MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
#include <asm/hardware.h>
/*
- * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * Warning: changing CONFIG_TEXT_BASE requires
* adapting the initial boot program.
* Since the linker has to swallow that define, we must use a pure
* hex number here!
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 14
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
#endif
#endif
* : [~500 KiB in size, stripped]
* 0xc000 0000 Top of RAM
*
- * Setting gd->relocaddr to CONFIG_SYS_TEXT_BASE in dram_init_banksize
+ * Setting gd->relocaddr to CONFIG_TEXT_BASE in dram_init_banksize
* prevents U-Boot from relocating itself when it is run as an ELF
* program by the prior stage bootloader.
*
*
* Setting #if 0: u-boot will start from flash and relocate itself to RAM
*
- * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
+ * Please do not forget to modify the setting of CONFIG_TEXT_BASE
* in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
*
* ---
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2009-2012 Freescale Semiconductor, Inc.
+ * Copyright 2020-2021 NXP
+ */
+
+/*
+ * Corenet DS style board configuration file
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <linux/stringify.h>
+
+#include "../board/freescale/common/ics307_clk.h"
+
+#ifdef CONFIG_RAMBOOT_PBL
+#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE
+#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
+#endif
+
+#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
+/* Set 1M boot space */
+#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
+#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
+ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
+#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
+#endif
+
+/* High Level Configuration Options */
+
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
+#endif
+
+#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
+
+/*
+ * These can be toggled for performance analysis, otherwise use default.
+ */
+#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
+#ifdef CONFIG_DDR_ECC
+#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
+#endif
+
+#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */
+
+/*
+ * Config the L3 Cache as L3 SRAM
+ */
+#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE)
+#else
+#define CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_ADDR
+#endif
+#define CONFIG_SYS_L3_SIZE (1024 << 10)
+#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE)
+
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_DCSRBAR 0xf0000000
+#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
+#endif
+
+/*
+ * DDR Setup
+ */
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
+
+#define SPD_EEPROM_ADDRESS1 0x51
+#define SPD_EEPROM_ADDRESS2 0x52
+#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */
+#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
+
+/*
+ * Local Bus Definitions
+ */
+
+/* Set the local bus clock 1/8 of platform clock */
+#define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8
+
+#define CONFIG_SYS_FLASH_BASE 0xe0000000 /* Start of PromJet */
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull
+#else
+#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
+#endif
+
+#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */
+#ifdef CONFIG_PHYS_64BIT
+#define PIXIS_BASE_PHYS 0xfffdf0000ull
+#else
+#define PIXIS_BASE_PHYS PIXIS_BASE
+#endif
+
+#define PIXIS_LBMAP_SWITCH 7
+#define PIXIS_LBMAP_MASK 0xf0
+#define PIXIS_LBMAP_SHIFT 4
+#define PIXIS_LBMAP_ALTBANK 0x40
+
+#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
+
+/* Nand Flash */
+#ifdef CONFIG_NAND_FSL_ELBC
+#define CONFIG_SYS_NAND_BASE 0xffa00000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull
+#else
+#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
+#endif
+
+#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+
+/* NAND flash config */
+#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
+ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
+ | BR_PS_8 /* Port Size = 8 bit */ \
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V) /* valid */
+#define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \
+ | OR_FCM_PGS /* Large Page*/ \
+ | OR_FCM_CSCT \
+ | OR_FCM_CST \
+ | OR_FCM_CHT \
+ | OR_FCM_SCY_1 \
+ | OR_FCM_TRLX \
+ | OR_FCM_EHTR)
+#endif /* CONFIG_NAND_FSL_ELBC */
+
+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS}
+
+#define CONFIG_HWCONFIG
+
+/* define to use L1 as initial stack */
+#define CONFIG_L1_INIT_RAM
+#define CONFIG_SYS_INIT_RAM_LOCK
+#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR
+/* The assembler doesn't like typecast */
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
+ ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
+#else
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR /* Initial L1 address */
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
+#endif
+#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */
+
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
+
+/* Serial Port - controlled on board with jumper J8
+ * open - index 2
+ * shorted - index 1
+ */
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
+#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
+#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
+
+/* I2C */
+
+/*
+ * RapidIO
+ */
+#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull
+#else
+#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000
+#endif
+#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */
+
+#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull
+#else
+#define CONFIG_SYS_SRIO2_MEM_PHYS 0xb0000000
+#endif
+#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */
+
+/*
+ * for slave u-boot IMAGE instored in master memory space,
+ * PHYS must be aligned based on the SIZE
+ */
+#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull
+#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull
+#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */
+#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull
+/*
+ * for slave UCODE and ENV instored in master memory space,
+ * PHYS must be aligned based on the SIZE
+ */
+#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull
+#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull
+#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */
+
+/* slave core release by master*/
+#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4
+#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */
+
+/*
+ * SRIO_PCIE_BOOT - SLAVE
+ */
+#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
+#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000
+#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \
+ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR)
+#endif
+
+/*
+ * eSPI - Enhanced SPI
+ */
+
+/*
+ * General PCI
+ * Memory space is mapped 1-1, but I/O space must start from 0.
+ */
+
+/* controller 1, direct to uli, tgtid 3, Base address 20000 */
+#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
+#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000
+#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull
+
+/* controller 2, Slot 2, tgtid 2, Base address 201000 */
+#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
+#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull
+#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000
+#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull
+
+/* controller 3, Slot 1, tgtid 1, Base address 202000 */
+#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000
+#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull
+#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
+#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
+
+/* controller 4, Base address 203000 */
+#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull
+#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
+
+/* Qman/Bman */
+#define CONFIG_SYS_BMAN_NUM_PORTALS 10
+#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull
+#else
+#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE
+#endif
+#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000
+#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000
+#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000
+#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE
+#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \
+ CONFIG_SYS_BMAN_CENA_SIZE)
+#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08
+#define CONFIG_SYS_QMAN_NUM_PORTALS 10
+#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull
+#else
+#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
+#endif
+#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000
+#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
+#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
+#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
+#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \
+ CONFIG_SYS_QMAN_CENA_SIZE)
+#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
+
+#define CONFIG_SYS_DPAA_FMAN
+#define CONFIG_SYS_DPAA_PME
+
+#ifdef CONFIG_FMAN_ENET
+#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c
+#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d
+#define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR 0x1e
+#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1f
+#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4
+
+#define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 0x1c
+#define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 0x1d
+#define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 0x1e
+#define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 0x1f
+#define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0
+
+#define CONFIG_SYS_TBIPA_VALUE 8
+#endif
+
+/*
+ * Environment
+ */
+#define CONFIG_LOADS_ECHO /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
+
+#ifdef CONFIG_MMC
+#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 64 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ROOTPATH "/opt/nfsroot"
+#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
+
+#ifdef CONFIG_TARGET_P4080DS
+#define __USB_PHY_TYPE ulpi
+#else
+#define __USB_PHY_TYPE utmi
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \
+ "bank_intlv=cs0_cs1;" \
+ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\
+ "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
+ "netdev=eth0\0" \
+ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
+ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \
+ "tftpflash=tftpboot $loadaddr $uboot && " \
+ "protect off $ubootaddr +$filesize && " \
+ "erase $ubootaddr +$filesize && " \
+ "cp.b $loadaddr $ubootaddr $filesize && " \
+ "protect on $ubootaddr +$filesize && " \
+ "cmp.b $loadaddr $ubootaddr $filesize\0" \
+ "consoledev=ttyS0\0" \
+ "ramdiskaddr=2000000\0" \
+ "ramdiskfile=p4080ds/ramdisk.uboot\0" \
+ "fdtaddr=1e00000\0" \
+ "fdtfile=p4080ds/p4080ds.dtb\0" \
+ "bdev=sda3\0"
+
+#include <asm/fsl_secure_boot.h>
+
+#endif /* __CONFIG_H */
#include <linux/sizes.h>
/*
- * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * Warning: changing CONFIG_TEXT_BASE requires
* adapting the initial boot program.
* Since the linker has to swallow that define, we must use a pure
* hex number here!
/* Defines for SPL */
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
#define CONFIG_SYS_NAND_ECCSIZE 256
#define CONFIG_SYS_NAND_ECCBYTES 3
* U-Boot Commands
*/
-/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
+/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_TEXT_BASE */
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
/* See common/spl/spl.c spl_set_header_raw_uboot() */
#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE
#include <configs/aspeed-common.h>
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* Misc */
#define CONFIG_EXTRA_ENV_SETTINGS \
#include <configs/aspeed-common.h>
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* Misc */
#define STR_HELPER(s) #s
#define CONFIG_SYS_MCKR_CSS 0x1302
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0xa0000
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
#endif
/* SPL */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* Dummy value */
#define CONFIG_SYS_UBOOT_BASE 0
/* Physical Memory Map */
-/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */
+/* CONFIG_TEXT_BASE needs to align with where ATF loads bl33.bin */
#define PHYS_SDRAM_1 0x00000000
/* Physical Memory Map */
-/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */
+/* CONFIG_TEXT_BASE needs to align with where ATF loads bl33.bin */
#define PHYS_SDRAM_1 0x00000000
#define PHYS_SDRAM_1_SIZE 0xC0000000
#ifdef CONFIG_NAND_MXS
# define CONFIG_SYS_MAX_NAND_DEVICE 1
# define CONFIG_SYS_NAND_BASE 0x40000000
-# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
/* MTD device */
#endif
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* Board and environment settings */
#define CONFIG_MXC_UART_BASE UART4_BASE
/* SPL */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* Dummy value */
#define CONFIG_SYS_UBOOT_BASE 0
#ifdef CONFIG_NAND_BOOT
#define CONFIG_SYS_NAND_U_BOOT_SIZE (400 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN 0x80000
#endif
/* NAND SPL */
#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
#ifdef CONFIG_NXP_ESBC
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
* CONFIG_SYS_FLASH_BASE has the final address (core view)
* CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
* CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
- * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
+ * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
*/
#define CONFIG_SYS_FLASH_BASE 0x60000000
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
/* NAND SPL */
#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN 0xa0000
#endif
* CONFIG_SYS_FLASH_BASE has the final address (core view)
* CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
* CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
- * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
+ * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
*/
#define CONFIG_SYS_FLASH_BASE 0x60000000
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
* CONFIG_SYS_FLASH_BASE has the final address (core view)
* CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
* CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
- * CONFIG_SYS_TEXT_BASE is linked to 0x30000000 for booting
+ * CONFIG_TEXT_BASE is linked to 0x30000000 for booting
*/
#define CONFIG_SYS_FLASH_BASE 0x580000000ULL
* CONFIG_SYS_FLASH_BASE has the final address (core view)
* CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
* CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
- * CONFIG_SYS_TEXT_BASE is linked to 0x30000000 for booting
+ * CONFIG_TEXT_BASE is linked to 0x30000000 for booting
*/
#define CONFIG_SYS_FLASH_BASE 0x580000000ULL
#include <asm/hardware.h>
/*
- * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * Warning: changing CONFIG_TEXT_BASE requires
* adapting the initial boot program.
* Since the linker has to swallow that define, we must use a pure
* hex number here!
/* SPL part */
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
#endif /* __CONFIG_H */
/* SPL */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* Dummy value */
#define CONFIG_SYS_UBOOT_BASE 0
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Uboot definition */
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* SPL -> Uboot */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* DRAM */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* SPL */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* Dummy value */
#define CONFIG_SYS_UBOOT_BASE 0
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Uboot definition */
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* SPL -> Uboot */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* DRAM */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Uboot definition */
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* SPL -> Uboot */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* DRAM */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Uboot definition */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
#define ENV_BOOT_READ_IMAGE \
"boot_rd_img=mmc dev 0" \
*/
/*
- * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h
+ * Custom CONFIG_TEXT_BASE can be done in <board>.h
*/
/* additions for new ARM relocation support */
/** Maximum size of image supported for bootm (and bootable FIT images) */
/** Memory base address */
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_SDRAM_BASE CONFIG_TEXT_BASE
/** Stack starting address */
/** Maximum size of image supported for bootm (and bootable FIT images) */
/** Memory base address */
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_SDRAM_BASE CONFIG_TEXT_BASE
/** Stack starting address */
#ifdef CONFIG_SDCARD
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
-#define CONFIG_SYS_MMC_U_BOOT_DST CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MMC_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MMC_U_BOOT_DST CONFIG_TEXT_BASE
+#define CONFIG_SYS_MMC_U_BOOT_START CONFIG_TEXT_BASE
#ifdef CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR
#define CONFIG_SYS_MMC_U_BOOT_OFFS (CONFIG_SPL_PAD_TO - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA*512)
#else
#endif
#elif defined(CONFIG_SPIFLASH)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_TEXT_BASE
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_TEXT_BASE
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SPL_PAD_TO
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
"loadaddr=1000000\0" \
"bootfile=uImage\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
- "erase " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) " $filesize; " \
- "protect on " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
+ "protect off " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \
+ "erase " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) " $filesize; " \
+ "protect on " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) " $filesize\0" \
"hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
/* Memory layout */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/*
* The board really has 256M. However, the VC (VideoCore co-processor) shares
* the RAM, and uses a configurable portion at the top. We tell U-Boot that a
#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
CONFIG_SYS_NAND_ECCSTEPS)
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
#include <linux/sizes.h>
/*
- * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
+ * Warning: changing CONFIG_TEXT_BASE requires adapting the initial boot
* program. Since the linker has to swallow that define, we must use a pure
* hex number here!
*/
#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
#define CONFIG_SYS_NAND_SIZE (SZ_256M)
#define CONFIG_SYS_NAND_ECCSIZE 256
#include <linux/sizes.h>
/*
- * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * Warning: changing CONFIG_TEXT_BASE requires
* adapting the initial boot program.
* Since the linker has to swallow that define, we must use a pure
* hex number here!
#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
#define CONFIG_SYS_NAND_ECCSIZE 256
/* General parts of the framework, required. */
#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
#endif
#endif /* !CONFIG_NOR_BOOT */
/* SPL */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* Dummy value */
#define CONFIG_SYS_UBOOT_BASE 0
/* Use the framework and generic lib */
/* SPL will use serial */
/* SPL will load U-Boot from NAND offset 0x40000 */
-/* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
+/* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_TEXT_BASE */
#define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
/*
* Include SoC specific configuration
* spl_get_image_text_base() - get the text base of the next phase
*
* This returns the address that the next stage is linked to run at, i.e.
- * CONFIG_SPL_TEXT_BASE or CONFIG_SYS_TEXT_BASE
+ * CONFIG_SPL_TEXT_BASE or CONFIG_TEXT_BASE
*
* Return: text-base address
*/
*
* This sets up the given spl_image which the standard values obtained from
* config options: CONFIG_SYS_MONITOR_LEN, CONFIG_SYS_UBOOT_START,
- * CONFIG_SYS_TEXT_BASE.
+ * CONFIG_TEXT_BASE.
*
* @spl_image: Image description to set up
*/
((func_t)addr)(0, 0, info);
#else
- cpu_call32(cs32, CONFIG_SYS_TEXT_BASE, info);
+ cpu_call32(cs32, CONFIG_TEXT_BASE, info);
#endif
}
if ((desc & GDT_PRESENT) && (desc & GDT_NOTSYS) &&
!(desc & GDT_LONG) && (desc & GDT_4KB) &&
(desc & GDT_32BIT) && (desc & GDT_CODE) &&
- CONFIG_SYS_TEXT_BASE > base &&
- CONFIG_SYS_TEXT_BASE + CONFIG_SYS_MONITOR_LEN < limit
+ CONFIG_TEXT_BASE > base &&
+ CONFIG_TEXT_BASE + CONFIG_SYS_MONITOR_LEN < limit
) {
cs32 = i;
break;
priv->memmap_desc, priv->memmap_size);
add_entry_addr(priv, EFIET_END, NULL, 0, 0, 0);
- memcpy((void *)CONFIG_SYS_TEXT_BASE, _binary_u_boot_bin_start,
+ memcpy((void *)CONFIG_TEXT_BASE, _binary_u_boot_bin_start,
(ulong)_binary_u_boot_bin_end -
(ulong)_binary_u_boot_bin_start);
printhex8(priv->info->total_size);
#endif
putc('\n');
- jump_to_uboot(cs32, CONFIG_SYS_TEXT_BASE, (ulong)priv->info);
+ jump_to_uboot(cs32, CONFIG_TEXT_BASE, (ulong)priv->info);
return EFI_LOAD_ERROR;
}
struct elf_rela *rel = (void*)&__efi_runtime_rel_start;
#else
struct elf_rel *rel = (void*)&__efi_runtime_rel_start;
- static ulong lastoff = CONFIG_SYS_TEXT_BASE;
+ static ulong lastoff = CONFIG_TEXT_BASE;
#endif
debug("%s: Relocating to offset=%lx\n", __func__, offset);
for (; (ulong)rel < (ulong)&__efi_runtime_rel_stop; rel++) {
- ulong base = CONFIG_SYS_TEXT_BASE;
+ ulong base = CONFIG_TEXT_BASE;
ulong *p;
ulong newaddr;
switch (rel->info & R_MASK) {
case R_RELATIVE:
#ifdef IS_RELA
- newaddr = rel->addend + offset - CONFIG_SYS_TEXT_BASE;
+ newaddr = rel->addend + offset - CONFIG_TEXT_BASE;
#else
newaddr = *p - lastoff + offset;
#endif
extern struct dyn_sym __dyn_sym_start[];
newaddr = __dyn_sym_start[symidx].addr + offset;
#ifdef IS_RELA
- newaddr -= CONFIG_SYS_TEXT_BASE;
+ newaddr -= CONFIG_TEXT_BASE;
#endif
break;
}
if (gd->flags & GD_FLG_RELOC)
offset -= gd->relocaddr;
else
- offset -= CONFIG_SYS_TEXT_BASE;
+ offset -= CONFIG_TEXT_BASE;
#endif
return offset / FUNC_SITE_SIZE;
}
if (hdr->ftrace_count < hdr->ftrace_size) {
struct trace_call *rec = &hdr->ftrace[hdr->ftrace_count];
- rec->func = CONFIG_SYS_TEXT_BASE;
+ rec->func = CONFIG_TEXT_BASE;
rec->caller = 0;
rec->flags = FUNCF_TEXTBASE;
}
skip-at-start:
This property specifies the entry offset of the first entry.
- For PowerPC mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the entry
+ For PowerPC mpc85xx based CPU, CONFIG_TEXT_BASE is the entry
offset of the first entry. It can be 0xeff40000 or 0xfff40000 for
nor flash boot, 0x201000 for sd boot etc.
- 'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE +
+ 'end-at-4gb' property is not applicable where CONFIG_TEXT_BASE +
Image size != 4gb.
align-default:
os = "U-Boot";
arch = "arm64";
compression = "none";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};
};
os = "U-Boot";
arch = "arm64";
compression = "none";
- load = <CONFIG_SYS_TEXT_BASE>;
+ load = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};
};
#
# The section must be set up so that U-Boot is placed at the
# flash address to which it is linked. For example, if
- # CONFIG_SYS_TEXT_BASE is 0xfff00000, and the ROM is 8MB, then
+ # CONFIG_TEXT_BASE is 0xfff00000, and the ROM is 8MB, then
# the U-Boot region must start at offset 7MB in the section. In this
# case the ROM starts at 0xff800000, so the offset of the first
# entry in the section corresponds to that.
projects / u-boot.git / commitdiff