]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: Add mac node for rk3308 at dtsi level
authorDavid Wu <david.wu@rock-chips.com>
Tue, 26 Nov 2019 01:39:50 +0000 (09:39 +0800)
committerKever Yang <kever.yang@rock-chips.com>
Thu, 5 Dec 2019 16:06:23 +0000 (00:06 +0800)
The rk3308 only support RMII mode, and if it is output clock
mode, better to use ref_clk pin with drive strength 12ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3308.dtsi

index 0eeec165d4d4a6e50d84fb7af86c7b5d577860a4..a5c0b72ae05cade7d8cf361722fa963d31c65533 100644 (file)
                status = "disabled";
        };
 
+       mac: ethernet@ff4e0000 {
+               compatible = "rockchip,rk3308-mac";
+               reg = <0x0 0xff4e0000 0x0 0x10000>;
+               rockchip,grf = <&grf>;
+               interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "macirq";
+               clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>,
+                        <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>,
+                        <&cru SCLK_MAC>, <&cru ACLK_MAC>,
+                        <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>;
+               clock-names = "stmmaceth", "mac_clk_rx",
+                             "mac_clk_tx", "clk_mac_ref",
+                             "clk_mac_refout", "aclk_mac",
+                             "pclk_mac", "clk_mac_speed";
+               phy-mode = "rmii";
+               pinctrl-names = "default";
+               pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
+               resets = <&cru SRST_MAC_A>;
+               reset-names = "stmmaceth";
+               status = "disabled";
+       };
+
        cru: clock-controller@ff500000 {
                compatible = "rockchip,rk3308-cru";
                reg = <0x0 0xff500000 0x0 0x1000>;