u8 *val)
{
struct spi_mem_op op =
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1),
- SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 1),
- SPI_MEM_OP_DUMMY(dummy / 8, 1),
- SPI_MEM_OP_DATA_IN(1, NULL, 1));
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 0),
+ SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 0),
+ SPI_MEM_OP_DUMMY(dummy, 0),
+ SPI_MEM_OP_DATA_IN(1, NULL, 0));
+ u8 buf[2];
+ int ret;
+
+ spi_nor_setup_op(nor, &op, nor->reg_proto);
+
+ /*
+ * In Octal DTR mode, the number of address bytes is always 4 regardless
+ * of addressing mode setting.
+ */
+ if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR)
+ op.addr.nbytes = 4;
+
+ /*
+ * We don't want to read only one byte in DTR mode. So, read 2 and then
+ * discard the second byte.
+ */
+ if (spi_nor_protocol_is_dtr(nor->reg_proto))
+ op.data.nbytes = 2;
- return spi_nor_read_write_reg(nor, &op, val);
+ ret = spi_nor_read_write_reg(nor, &op, buf);
+ if (ret)
+ return ret;
+
+ *val = buf[0];
+
+ return 0;
}
static int spansion_write_any_reg(struct spi_nor *nor, u32 addr, u8 val)