]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_L2_CACHE to Kconfig
authorTom Rini <trini@konsulko.com>
Fri, 2 Dec 2022 21:42:33 +0000 (16:42 -0500)
committerTom Rini <trini@konsulko.com>
Thu, 22 Dec 2022 15:31:48 +0000 (10:31 -0500)
This converts the following to Kconfig:
   CONFIG_L2_CACHE

Signed-off-by: Tom Rini <trini@konsulko.com>
45 files changed:
arch/powerpc/cpu/mpc85xx/Kconfig
configs/MPC8548CDS_36BIT_defconfig
configs/MPC8548CDS_defconfig
configs/MPC8548CDS_legacy_defconfig
configs/P1010RDB-PA_36BIT_NAND_defconfig
configs/P1010RDB-PA_36BIT_NOR_defconfig
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PA_NAND_defconfig
configs/P1010RDB-PA_NOR_defconfig
configs/P1010RDB-PA_SDCARD_defconfig
configs/P1010RDB-PA_SPIFLASH_defconfig
configs/P1010RDB-PB_36BIT_NAND_defconfig
configs/P1010RDB-PB_36BIT_NOR_defconfig
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PB_NAND_defconfig
configs/P1010RDB-PB_NOR_defconfig
configs/P1010RDB-PB_SDCARD_defconfig
configs/P1010RDB-PB_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_NAND_defconfig
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_defconfig
configs/P1020RDB-PC_NAND_defconfig
configs/P1020RDB-PC_SDCARD_defconfig
configs/P1020RDB-PC_SPIFLASH_defconfig
configs/P1020RDB-PC_defconfig
configs/P1020RDB-PD_NAND_defconfig
configs/P1020RDB-PD_SDCARD_defconfig
configs/P1020RDB-PD_SPIFLASH_defconfig
configs/P1020RDB-PD_defconfig
configs/P2020RDB-PC_36BIT_NAND_defconfig
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P2020RDB-PC_36BIT_defconfig
configs/P2020RDB-PC_NAND_defconfig
configs/P2020RDB-PC_SDCARD_defconfig
configs/P2020RDB-PC_SPIFLASH_defconfig
configs/P2020RDB-PC_defconfig
configs/socrates_defconfig
include/configs/MPC8548CDS.h
include/configs/P1010RDB.h
include/configs/p1_p2_rdb_pc.h
include/configs/socrates.h

index 721dafc5ab1690e167c9f39f8bb56a00437d2fd7..36519613a2cc95513fa480aa1d74c2f7cba2305b 100644 (file)
@@ -1297,6 +1297,9 @@ config SYS_NUM_TLBCAMS
                Number of TLB CAM entries for Book-E chips. 64 for E500MC,
                16 for other E500 SoCs.
 
+config L2_CACHE
+       bool "Enable L2 cache support"
+
 if HETROGENOUS_CLUSTERS
 
 config SYS_MAPLE
index 241cb80fde92a0d94d7f00fc2c2f7c649008aa46..05034ce2e4691c4da5710732f89cba59186d840b 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SRIO1=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_USE_UBOOTPATH=y
 CONFIG_UBOOTPATH="8548cds/u-boot.bin"
index 5af056bd4f4dddd53ead21dbd4a905be3881b341..965c37e45ec26c93d0feeb463f1cbba988409e40 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SRIO1=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_USE_UBOOTPATH=y
 CONFIG_UBOOTPATH="8548cds/u-boot.bin"
index 34d1938129ff28588fc55acf51d94a3d260c4859..004175c80482c3ec3ffc97cade0301db953763ce 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SRIO1=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_TARGET_MPC8548CDS_LEGACY=y
 CONFIG_USE_UBOOTPATH=y
index 3fb993e201ce6694cd90a319f4b8286d7d53a4fa..c12948ae7c85f9fb557db5cec8b2ed05e092d95a 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index dc6dd717df9bb133d7a653405f1da524c29732f6..6a320713ebde5d24c4a743bf5982e5a88d66ffd1 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index bc29526f636e463f31a54b04bcceb35cfa6f40b2..e3b786d4efdbeec187c1fbf0f63f178411c2664f 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 5c42d5ee367e802a7d48fe6e63f47197c92c3825..e6ce59e297196f0588b16534c37ef728275c8eb1 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index b6e68d27885464eb1dad7d6038c9c2c0e2d4dd09..99b94a061dfaabd2364f7eda35a971e11b1c59a0 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index fe24faa1757e65569572207b87d8850b91c58bc1..071123362f5ae889bbd8d38c5f2d29cae76034c6 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index 110a9b4ad3d0e448a65224f5cc696d18446ef917..9f2afcdadc9d2327972cf938b0cfe16b7eb20bbc 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index fcd60f7a4ef9f4aa9898c2c090d9948b5a6470e9..7c64fdcf6f095da5eb075aa6e640de7ec9821c16 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 76919c3881faee8b33dabe64109a6621ff174493..87953b8f1905e72ac4f7e311b9e17699b754e1f0 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index b2972586946113966516da7f035cd2c37c2db336..bf7078015e23f0bc1b7ec7edcb432ab4eaa2d10b 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index df80488cff15aa01c81203c804787e3a4c137565..4dbf8695e4e8bb857d1fbfaf57d438f01fc78e12 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index d27ea17a0b62ed7099ea9ad5fe24e68ead63a688..f5bcffbd490d0d7f63eaf28aab72587a01e249ad 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 88de4f9b92e5a7982c7e53f2441e0b50a461b855..82f29bed54e70ecff492601ddcf48c479a989e2e 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index 2e86aec5958dae96148e4df1613802f1c0a105a7..985243cebd8c8558d49bc54c6a4bb094991e1502 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index d5bbd6dca54097826ba56be81b457ad29b9a59e8..3dfb509c8adeb526ab635a4a3d036556a12cedc6 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 66efe739e99f8de732340eced78263761343c7f7..f3d399f84f7fa84172296464edf65a48727f9924 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 0f082f6e6e2d5ff64a8ace93fc77bbaf66a46097..de04556b224c257df5b2036a1fcbd7c1b08d72a7 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index 88e10af29a3e76a41fc5c1eaf1af21e552e13d0d..2d201bf55e96a1fc0c7ff7fc4c6ecb45ffb5a20c 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 729e93eae2397141abcc8470cb8ef27c23c369da..a6b7a4abf502e1330eaf26888071d6ecfd531408 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 2860c286d712502c0ee5d4ea33ac9fa7a60d0733..58f2475571423a585a1515f70fa9b59cf8581340 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index 0958a0a94b5b6ac431f3abfbad58f767dfbcbb55..cf47bd49c7acdf89ff9bcde6fe7005c333022265 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index 81bb26cb8fde5958b66486073a334352ae4856dd..3a86a9ef525fc52af3bb5514fac95b5ed505f940 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 481009f307691aee97f881551f4d531ea1573216..9fe2b1d88f56ee094f2af2e6a7f0c3db8b0ac41d 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 49207eb65a0ee26387c105b5ecf0035623333e3d..17bde92263b9529b527b2dd1b81e53f27b4e33f6 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index 7e22b4e34c5eeeac764d2778e105ce4dc09b0609..2f768c06705a481f1b86b066668503ea406d57ff 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index 62b25f0398329e688315898442a598dd8c083014..6cb3be08dc21bd91c621b14bb6df374fcd3f0530 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index f5864dea4dbcd7959eec4fea02c5d135f6bf0ab8..0eb2b3ab74b17e715e3bf2d8da6853073a4fd64c 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index ca04007288489353a25f3dcf19d1a4ba019e9ecc..b0ccaa1cfde29e92f6d7da418ce9d497c6aac4db 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index 2420217b890cb676bfa9be5fc3523195bb6244ea..c53c4c6c7cc3b65d0650a63ff53fbb3b0fa941b1 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index 22b0023ec6c8c86c709eb475c6e944269c007647..0ac74287fdee0140aa32fefd804b089fdcbb1eff 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 8c95203a4a0d2f90d1de9a3d70e41b900954ea89..9da9ef0c69175d10c12e9d85700c8fdd0eb3c8d9 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index b87c965d50ba849c7c8ccf6d9f1f5fc0c566e1b0..bb5df66c7493f1fec78d177ddfb3b0e20bc78046 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index 1d33cf6750bebe7184620d5a377faa00ad12441e..4758e0e3715319717056be19e77043e228083642 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
index 8d44e5b425caf6040f02fe37dd294f39d3e51036..1584a8a7c3a61ea0949764cf70662d28ee87b79e 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 9155768c15ca9da5a977e064fcaaaf5b4cfe4128..6acb0bcb12efe1c33b0bcce5809dc1290bf85eb0 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
index 4f3be9eb242b68f0924849fbc9210df36f74e6a4..2afef4a5eb01fde68aceb1b2f17f9f9164cef569 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_USE_UBOOTPATH=y
index 4cc50d355896b964a33f2343934fe2383ecddd7c..46be662037e7e53adc2e96325eeec62f9c792b99 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_SOCRATES=y
+CONFIG_L2_CACHE=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MONITOR_LEN=393216
 CONFIG_FIT=y
index 1f1eacdb691682afc40e50ab40b36de476a8d70c..3d0c2192ee14820b07e338d770e060d9dc4af653 100644 (file)
 #include <linux/stringify.h>
 #endif
 
-/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE                        /* toggle L2 cache */
-
 /*
  * Only possible on E500 Version 2 or newer cores.
  */
index 02d49c3d3407b3692f5199c1686f734365afee92..c398ece784598e494c3b235d0d5adb99d3c66ad8 100644 (file)
 #endif
 #endif
 
-/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE                        /* toggle L2 cache */
-
 /* DDR Setup */
 #define SPD_EEPROM_ADDRESS             0x52
 
index ee25990b034f4eee9e76c720d511baa42be2926b..c05904a813d08919bab7f2eee7eb9c56b0f3b072 100644 (file)
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
-/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE
-
 #define CFG_SYS_CCSRBAR                0xffe00000
 #define CFG_SYS_CCSRBAR_PHYS_LOW       CFG_SYS_CCSRBAR
 
index 11d840223312cc8d4aadfce21224d1921657f3a9..0547ed02563e969b21b8eca6d3b0685e813ed3ef 100644 (file)
  * in the README.mpc85xxads.
  */
 
-/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE                        /* toggle L2 cache              */
-
 #define CFG_SYS_INIT_DBCR DBCR_IDM             /* Enable Debug Exceptions      */
 
 #undef CFG_SYS_DRAM_TEST                       /* memory test, takes time      */