fsl/mpc85xx: define common serdes_clock_to_string function

This allows to share some common code for the boards that use a corenet
base SoC.

Two different versions of the function are available in
fsl_corenet_serdes.c and fsl_corenet2_serdes.c files.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: fix t1040qds.c]
Acked-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index 39d9409d64bab1442908e3ec8de64fb054aa3b52..25db899e5fb806948eb4bf28ffea25bb41216095 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -201,3 +201,24 @@ void fsl_serdes_init(void)
 #endif
 
 }
+
+const char *serdes_clock_to_string(u32 clock)
+{
+       switch (clock) {
+       case SRDS_PLLCR0_RFCK_SEL_100:
+               return "100";
+       case SRDS_PLLCR0_RFCK_SEL_125:
+               return "125";
+       case SRDS_PLLCR0_RFCK_SEL_156_25:
+               return "156.25";
+       case SRDS_PLLCR0_RFCK_SEL_161_13:
+               return "161.1328123";
+       default:
+#if defined(CONFIG_T4240QDS)
+               return "???";
+#else
+               return "122.88";
+#endif
+       }
+}
+

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index 680b5222bc419e80145aef871ec518d568170e38..ba22f90a6f92ec1e1c1bff290a6232a183e78c54 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -858,3 +858,20 @@ void fsl_serdes_init(void)
        }
 #endif
 }
+
+const char *serdes_clock_to_string(u32 clock)
+{
+       switch (clock) {
+       case SRDS_PLLCR0_RFCK_SEL_100:
+               return "100";
+       case SRDS_PLLCR0_RFCK_SEL_125:
+               return "125";
+       case SRDS_PLLCR0_RFCK_SEL_156_25:
+               return "156.25";
+       case SRDS_PLLCR0_RFCK_SEL_161_13:
+               return "161.1328123";
+       default:
+               return "150";
+       }
+}
+

diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h
index 1106d280583e065ba364989140a031bcec391877..cce892ce90a1e6bf20db1d56776cbb4b38833977 100644 (file)
--- a/arch/powerpc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
@@ -86,6 +86,7 @@ enum srds {
 
 int is_serdes_configured(enum srds_prtcl device);
 void fsl_serdes_init(void);
+const char *serdes_clock_to_string(u32 clock);
 
 #ifdef CONFIG_FSL_CORENET
 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2

diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index f74651c5209c1ea84793397d72973cbd6c7689aa..f6b012dbbc6370c718dbac9cf2d8dae2fef1d98a 100644 (file)
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -457,22 +457,6 @@ static int serdes_refclock(u8 sw, u8 sdclk)
        return ret;
 }
 
-static const char *serdes_clock_to_string(u32 clock)
-{
-       switch (clock) {
-       case SRDS_PLLCR0_RFCK_SEL_100:
-               return "100";
-       case SRDS_PLLCR0_RFCK_SEL_125:
-               return "125";
-       case SRDS_PLLCR0_RFCK_SEL_156_25:
-               return "156.25";
-       case SRDS_PLLCR0_RFCK_SEL_161_13:
-               return "161.13";
-       default:
-               return "122.88";
-       }
-}
-
 #define NUM_SRDS_BANKS 2
 
 int misc_init_r(void)

diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 60e2100af3089144759b42f6ed66d82bc15ae96c..9212372feed97719e7863e77b7d801749fde2a1c 100644 (file)
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -127,20 +127,6 @@ int board_early_init_r(void)
        return 0;
 }
 
-static const char *serdes_clock_to_string(u32 clock)
-{
-       switch(clock) {
-       case SRDS_PLLCR0_RFCK_SEL_100:
-               return "100";
-       case SRDS_PLLCR0_RFCK_SEL_125:
-               return "125";
-       case SRDS_PLLCR0_RFCK_SEL_156_25:
-               return "156.25";
-       default:
-               return "150";
-       }
-}
-
 #define NUM_SRDS_BANKS 3
 
 int misc_init_r(void)

diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 60694a6723d1cb7c79edf4b6c6ff8747de91a361..8554512df69eabea0ff8fe6b35bb2d1f80687a54 100644 (file)
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -155,20 +155,6 @@ unsigned long get_board_sys_clk(unsigned long dummy)
        }
 }
 
-static const char *serdes_clock_to_string(u32 clock)
-{
-       switch (clock) {
-       case SRDS_PLLCR0_RFCK_SEL_100:
-               return "100";
-       case SRDS_PLLCR0_RFCK_SEL_125:
-               return "125";
-       case SRDS_PLLCR0_RFCK_SEL_156_25:
-               return "156.25";
-       default:
-               return "150";
-       }
-}
-
 #define NUM_SRDS_BANKS 2
 
 int misc_init_r(void)

diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c
index 5abb18a2603aec81a333508d604b2433672203b3..2aa176c7a295d01e6161e99215691c85bb6384a5 100644 (file)
--- a/board/freescale/t1040qds/t1040qds.c
+++ b/board/freescale/t1040qds/t1040qds.c
@@ -160,20 +160,6 @@ unsigned long get_board_ddr_clk(void)
        return 66666666;
 }
 
-static const char *serdes_clock_to_string(u32 clock)
-{
-       switch (clock) {
-       case SRDS_PLLCR0_RFCK_SEL_100:
-               return "100";
-       case SRDS_PLLCR0_RFCK_SEL_125:
-               return "125";
-       case SRDS_PLLCR0_RFCK_SEL_156_25:
-               return "156.25";
-       default:
-               return "Unknown frequency";
-       }
-}
-
 #define NUM_SRDS_BANKS 2
 int misc_init_r(void)
 {

diff --git a/board/freescale/t4qds/t4240qds.c b/board/freescale/t4qds/t4240qds.c
index 0c1a4fbd9ff7b4f6a44656f740290a8e15f23f15..79b770b48891a8a6aedb76d1bc48d0781c3f6c0d 100644 (file)
--- a/board/freescale/t4qds/t4240qds.c
+++ b/board/freescale/t4qds/t4240qds.c
@@ -608,22 +608,6 @@ unsigned long get_board_ddr_clk(void)
        return 66666666;
 }
 
-static const char *serdes_clock_to_string(u32 clock)
-{
-       switch (clock) {
-       case SRDS_PLLCR0_RFCK_SEL_100:
-               return "100";
-       case SRDS_PLLCR0_RFCK_SEL_125:
-               return "125";
-       case SRDS_PLLCR0_RFCK_SEL_156_25:
-               return "156.25";
-       case SRDS_PLLCR0_RFCK_SEL_161_13:
-               return "161.1328125";
-       default:
-               return "???";
-       }
-}
-
 int misc_init_r(void)
 {
        u8 sw;