]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: add IPQ4019 ESS EDMA U-Boot additions
authorRobert Marko <robert.marko@sartura.hr>
Mon, 3 Jun 2024 12:06:16 +0000 (14:06 +0200)
committerCaleb Connolly <caleb.connolly@linaro.org>
Thu, 25 Jul 2024 23:53:13 +0000 (01:53 +0200)
IPQ4019 ESS EDMA support is not yet in upstream Linux, so for now lets use
the latest pending Linux DTS node for wired networking.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
arch/arm/dts/qcom-ipq4019-u-boot.dtsi [new file with mode: 0644]

diff --git a/arch/arm/dts/qcom-ipq4019-u-boot.dtsi b/arch/arm/dts/qcom-ipq4019-u-boot.dtsi
new file mode 100644 (file)
index 0000000..07aaaa9
--- /dev/null
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/ {
+       soc {
+               switch: switch@c000000 {
+                       compatible = "qcom,ipq4019-ess";
+                       reg = <0xc000000 0x80000>, <0x98000 0x800>, <0xc080000 0x8000>;
+                       reg-names = "base", "psgmii_phy", "edma";
+                       resets = <&gcc ESS_PSGMII_ARES>, <&gcc ESS_RESET>;
+                       reset-names = "psgmii", "ess";
+                       clocks = <&gcc GCC_ESS_CLK>;
+                       clock-names = "ess";
+                       mdio = <&mdio>;
+                       interrupts = <GIC_SPI  65 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  66 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  67 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  68 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  69 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  70 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  71 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  72 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  73 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  74 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  75 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  76 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  77 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  78 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  79 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI  80 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               swport1: port@1 { /* MAC1 */
+                                       reg = <1>;
+                                       label = "lan1";
+                                       phy-handle = <&ethphy0>;
+                                       phy-mode = "psgmii";
+
+                                       status = "disabled";
+                               };
+
+                               swport2: port@2 { /* MAC2 */
+                                       reg = <2>;
+                                       label = "lan2";
+                                       phy-handle = <&ethphy1>;
+                                       phy-mode = "psgmii";
+
+                                       status = "disabled";
+                               };
+
+                               swport3: port@3 { /* MAC3 */
+                                       reg = <3>;
+                                       label = "lan3";
+                                       phy-handle = <&ethphy2>;
+                                       phy-mode = "psgmii";
+
+                                       status = "disabled";
+                               };
+
+                               swport4: port@4 { /* MAC4 */
+                                       reg = <4>;
+                                       label = "lan4";
+                                       phy-handle = <&ethphy3>;
+                                       phy-mode = "psgmii";
+
+                                       status = "disabled";
+                               };
+
+                               swport5: port@5 { /* MAC5 */
+                                       reg = <5>;
+                                       label = "wan";
+                                       phy-handle = <&ethphy4>;
+                                       phy-mode = "psgmii";
+
+                                       status = "disabled";
+                               };
+                       };
+               };
+       };
+};
+
+&mdio {
+       psgmiiphy: psgmii-phy@5 {
+               reg = <5>;
+       };
+};