]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
armv8: dts: fsl-lx2162a: add dspi node into qds dts
authorZhao Qiang <qiang.zhao@nxp.com>
Fri, 11 Dec 2020 09:31:39 +0000 (17:31 +0800)
committerPriyanka Jain <priyanka.jain@nxp.com>
Mon, 8 Feb 2021 08:31:15 +0000 (14:01 +0530)
Add dspi node into lx2162aqds device tree

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/dts/fsl-lx2162a-qds.dts

index a2592c990fc16db2604d5d877af77dd4e885ac24..341610ccf4adde5d0de203986b6dcdb70012f3c7 100644 (file)
 / {
        model = "NXP Layerscape LX2162AQDS Board";
        compatible = "fsl,lx2162aqds", "fsl,lx2160a";
+
+       aliases {
+               spi1 = &dspi0;
+               spi2 = &dspi1;
+               spi3 = &dspi2;
+       };
 };
 
 &usb1 {
 &pcie6 {
        status = "disabled";
 };
+
+&dspi0 {
+       bus-num = <0>;
+       status = "okay";
+
+       dflash0: n25q128a {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
+       };
+       dflash1: sst25wf040b {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <1>;
+       };
+       dflash2: en25s64 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <2>;
+       };
+};
+
+&dspi1 {
+       bus-num = <0>;
+       status = "okay";
+
+       dflash3: n25q128a {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
+       };
+       dflash4: sst25wf040b {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <1>;
+       };
+       dflash5: en25s64 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <2>;
+       };
+};
+
+&dspi2 {
+       bus-num = <0>;
+       status = "okay";
+
+       dflash6: n25q128a {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
+       };
+       dflash7: sst25wf040b {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <1>;
+       };
+       dflash8: en25s64 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <2>;
+       };
+};