exynos:pinmux: Add pinmux support for i2c

This patch add pinmux for I2C for Exynos4

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add9db3de7fb3212c43e959d6603534c1c2d..44ce0726e992f7f08b6df8b8c3d1fdba234de9d9 100644 (file)
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -265,10 +265,74 @@ static int exynos5_pinmux_config(int peripheral, int flags)
        return 0;
 }
 
+static void exynos4_i2c_config(int peripheral, int flags)
+{
+       struct exynos4_gpio_part1 *gpio1 =
+               (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+
+       switch (peripheral) {
+       case PERIPH_ID_I2C0:
+               s5p_gpio_cfg_pin(&gpio1->d1, 0, GPIO_FUNC(0x2));
+               s5p_gpio_cfg_pin(&gpio1->d1, 1, GPIO_FUNC(0x2));
+               break;
+       case PERIPH_ID_I2C1:
+               s5p_gpio_cfg_pin(&gpio1->d1, 2, GPIO_FUNC(0x2));
+               s5p_gpio_cfg_pin(&gpio1->d1, 3, GPIO_FUNC(0x2));
+               break;
+       case PERIPH_ID_I2C2:
+               s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C3:
+               s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C4:
+               s5p_gpio_cfg_pin(&gpio1->b, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->b, 3, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C5:
+               s5p_gpio_cfg_pin(&gpio1->b, 6, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->b, 7, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C6:
+               s5p_gpio_cfg_pin(&gpio1->c1, 3, GPIO_FUNC(0x4));
+               s5p_gpio_cfg_pin(&gpio1->c1, 4, GPIO_FUNC(0x4));
+               break;
+       case PERIPH_ID_I2C7:
+               s5p_gpio_cfg_pin(&gpio1->d0, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->d0, 3, GPIO_FUNC(0x3));
+               break;
+       }
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+       switch (peripheral) {
+       case PERIPH_ID_I2C0:
+       case PERIPH_ID_I2C1:
+       case PERIPH_ID_I2C2:
+       case PERIPH_ID_I2C3:
+       case PERIPH_ID_I2C4:
+       case PERIPH_ID_I2C5:
+       case PERIPH_ID_I2C6:
+       case PERIPH_ID_I2C7:
+               exynos4_i2c_config(peripheral, flags);
+               break;
+       default:
+               debug("%s: invalid peripheral %d", __func__, peripheral);
+               return -1;
+       }
+
+       return 0;
+}
+
 int exynos_pinmux_config(int peripheral, int flags)
 {
        if (cpu_is_exynos5())
                return exynos5_pinmux_config(peripheral, flags);
+       else if (cpu_is_exynos4())
+               return exynos4_pinmux_config(peripheral, flags);
        else {
                debug("pinmux functionality not supported\n");
                return -1;