]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
spi: stm32_qspi: Fix short data write operation
authorDaniil Stas <daniil.stas@posteo.net>
Sun, 23 May 2021 22:24:49 +0000 (22:24 +0000)
committerPatrice Chotard <patrice.chotard@foss.st.com>
Fri, 18 Jun 2021 06:39:45 +0000 (08:39 +0200)
TCF flag only means that all data was sent to FIFO. To check if the
data was sent out of FIFO we should also wait for the BUSY flag to be
cleared. Otherwise there is a race condition which can lead to
inability to write short (one byte long) data.

Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
drivers/spi/stm32_qspi.c

index 4acc9047b9e89736fedfd1d15b2be65ee47293c8..8f4aabc3d16526d8c52b69725a05030d15ad40b2 100644 (file)
@@ -148,23 +148,24 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv *priv,
                                const struct spi_mem_op *op)
 {
        u32 sr;
-       int ret;
-
-       if (!op->data.nbytes)
-               return _stm32_qspi_wait_for_not_busy(priv);
+       int ret = 0;
 
-       ret = readl_poll_timeout(&priv->regs->sr, sr,
-                                sr & STM32_QSPI_SR_TCF,
-                                STM32_QSPI_CMD_TIMEOUT_US);
-       if (ret) {
-               log_err("cmd timeout (stat:%#x)\n", sr);
-       } else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) {
-               log_err("transfer error (stat:%#x)\n", sr);
-               ret = -EIO;
+       if (op->data.nbytes) {
+               ret = readl_poll_timeout(&priv->regs->sr, sr,
+                                        sr & STM32_QSPI_SR_TCF,
+                                        STM32_QSPI_CMD_TIMEOUT_US);
+               if (ret) {
+                       log_err("cmd timeout (stat:%#x)\n", sr);
+               } else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) {
+                       log_err("transfer error (stat:%#x)\n", sr);
+                       ret = -EIO;
+               }
+               /* clear flags */
+               writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF, &priv->regs->fcr);
        }
 
-       /* clear flags */
-       writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF, &priv->regs->fcr);
+       if (!ret)
+               ret = _stm32_qspi_wait_for_not_busy(priv);
 
        return ret;
 }