]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: zynqmp: Add resets to all GEMs
authorMichal Simek <michal.simek@xilinx.com>
Thu, 18 Nov 2021 12:42:27 +0000 (13:42 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 5 Jan 2022 09:22:02 +0000 (10:22 +0100)
There is a need to get IP out of reset to operate properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/041362197e8de8e9c696da64429107505bdc0c73.1637239345.git.michal.simek@xilinx.com
arch/arm/dts/zynqmp.dtsi

index 07d4d4b9120158359a0e9c4bb0772502c8b457e6..2264a80e331220617297cdf51fd3b834cd458d34 100644 (file)
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x874>;
                        power-domains = <&zynqmp_firmware PD_ETH_0>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;
                };
 
                gem1: ethernet@ff0c0000 {
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x875>;
                        power-domains = <&zynqmp_firmware PD_ETH_1>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
                };
 
                gem2: ethernet@ff0d0000 {
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x876>;
                        power-domains = <&zynqmp_firmware PD_ETH_2>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;
                };
 
                gem3: ethernet@ff0e0000 {
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x877>;
                        power-domains = <&zynqmp_firmware PD_ETH_3>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;
                };
 
                gpio: gpio@ff0a0000 {